From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Alistair Francis" <alistair@alistair23.me>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>
Subject: [PATCH v2 1/8] hw/misc/aspeed_scu: Introduce Aspeed2700SCUState
Date: Tue, 7 Jul 2026 06:09:22 +0000 [thread overview]
Message-ID: <20260707060919.350637-2-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260707060919.350637-1-jamin_lin@aspeedtech.com>
Introduce Aspeed2700SCUState as an AST2700-specific subclass of
AspeedSCUState.
Currently, AST1700 and AST2700 reuse the generic AspeedSCUState.
However, AST2700 requires SCU functionality that is specific to the
platform, particularly for interactions with its coprocessors.
Introduce a dedicated Aspeed2700SCUState to provide an extension point
for AST2700-specific functionality while keeping the generic
AspeedSCUState unchanged.
Subsequent patches will migrate AST2700 users to the new subclass and
move AST2700-specific code into it.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
include/hw/misc/aspeed_scu.h | 5 +++++
hw/misc/aspeed_scu.c | 8 +++++++-
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h
index c30940ab76..904549465f 100644
--- a/include/hw/misc/aspeed_scu.h
+++ b/include/hw/misc/aspeed_scu.h
@@ -20,6 +20,7 @@ OBJECT_DECLARE_TYPE(AspeedSCUState, AspeedSCUClass, ASPEED_SCU)
#define TYPE_ASPEED_2500_SCU TYPE_ASPEED_SCU "-ast2500"
#define TYPE_ASPEED_2600_SCU TYPE_ASPEED_SCU "-ast2600"
#define TYPE_ASPEED_2700_SCU TYPE_ASPEED_SCU "-ast2700"
+OBJECT_DECLARE_SIMPLE_TYPE(Aspeed2700SCUState, ASPEED_2700_SCU)
#define TYPE_ASPEED_2700_SCUIO TYPE_ASPEED_SCU "io" "-ast2700"
#define TYPE_ASPEED_1030_SCU TYPE_ASPEED_SCU "-ast1030"
@@ -41,6 +42,10 @@ struct AspeedSCUState {
uint32_t hw_prot_key;
};
+struct Aspeed2700SCUState {
+ AspeedSCUState parent_obj;
+};
+
#define AST2400_A1_SILICON_REV 0x02010303U
#define AST2500_A1_SILICON_REV 0x04010303U
#define AST2600_A3_SILICON_REV 0x05030303U
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 5dbf81c0ce..efe1d6315b 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -930,6 +930,11 @@ static void aspeed_ast2700_scu_reset_hold(Object *obj, ResetType type)
s->regs[AST2700_HW_STRAP1] = s->hw_strap1;
}
+static void aspeed_2700_scu_realize(DeviceState *dev, Error **errp)
+{
+ aspeed_scu_realize(dev, errp);
+}
+
static void aspeed_2700_scu_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -937,6 +942,7 @@ static void aspeed_2700_scu_class_init(ObjectClass *klass, const void *data)
AspeedSCUClass *asc = ASPEED_SCU_CLASS(klass);
dc->desc = "ASPEED 2700 System Control Unit";
+ dc->realize = aspeed_2700_scu_realize;
rc->phases.hold = aspeed_ast2700_scu_reset_hold;
asc->resets = ast2700_a0_resets;
asc->calc_hpll = aspeed_2600_scu_calc_hpll;
@@ -1161,7 +1167,7 @@ static const TypeInfo aspeed_scu_types[] = {
{
.name = TYPE_ASPEED_2700_SCU,
.parent = TYPE_ASPEED_SCU,
- .instance_size = sizeof(AspeedSCUState),
+ .instance_size = sizeof(Aspeed2700SCUState),
.class_init = aspeed_2700_scu_class_init,
},
{
--
2.43.0
next prev parent reply other threads:[~2026-07-07 6:09 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-07 6:09 [PATCH v2 0/8] Refactor AST2700 SCU preparation for coprocessors Jamin Lin
2026-07-07 6:09 ` Jamin Lin [this message]
2026-07-07 9:27 ` [PATCH v2 1/8] hw/misc/aspeed_scu: Introduce Aspeed2700SCUState Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 2/8] hw/arm/aspeed: Use Aspeed2700SCUState for AST2700 users Jamin Lin
2026-07-07 9:28 ` Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 3/8] hw/arm/aspeed_ast27x0: Move SCU link into AST27x0 coprocessors Jamin Lin
2026-07-16 6:37 ` Cédric Le Goater
2026-07-07 6:09 ` [PATCH v2 4/8] hw/misc/aspeed_scu: Add separate reset handler for AST2700 SCUIO Jamin Lin
2026-07-07 9:22 ` Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 5/8] hw/arm/aspeed_ast27x0: Pass realized PSP SoC to SSP/TSP initialization Jamin Lin
2026-07-07 9:27 ` Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 6/8] hw/arm/ast27x0: Share single SCUIO instance across PSP, SSP, and TSP Jamin Lin
2026-07-07 9:24 ` Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 7/8] hw/arm/ast27x0: Share FMC controller with SSP " Jamin Lin
2026-07-07 9:26 ` Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 8/8] hw/ssi/aspeed_smc: Add Data FIFO-based flash access support for AST2700 Jamin Lin
2026-07-14 17:51 ` Cédric Le Goater
2026-07-15 7:58 ` Jamin Lin
2026-07-16 6:30 ` Cédric Le Goater
2026-07-16 6:39 ` Cédric Le Goater
2026-07-08 22:59 ` [PATCH v2 0/8] Refactor AST2700 SCU preparation for coprocessors Philippe Mathieu-Daudé
2026-07-09 22:53 ` Philippe Mathieu-Daudé
2026-07-16 6:22 ` Jamin Lin
2026-07-16 6:29 ` Cédric Le Goater
2026-07-09 23:12 ` Philippe Mathieu-Daudé
2026-07-15 8:16 ` Jamin Lin
2026-07-16 6:40 ` Cédric Le Goater
2026-07-16 6:42 ` Cédric Le Goater
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