From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Alistair Francis" <alistair@alistair23.me>,
"Fabiano Rosas" <farosas@suse.de>,
"Laurent Vivier" <lvivier@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Troy Lee" <troy_lee@aspeedtech.com>,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v4 3/9] hw/arm/aspeed_ast27x0: Move SCU link into AST27x0 coprocessors
Date: Fri, 17 Jul 2026 08:46:04 +0000 [thread overview]
Message-ID: <20260717084559.3477061-4-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260717084559.3477061-1-jamin_lin@aspeedtech.com>
The SCU link is only needed by the AST27x0 SSP/TSP coprocessors for their
AST2700-specific SCU alias window.
Move the link property from the common AspeedCoprocessorState into
Aspeed27x0CoprocessorState, so the generic coprocessor model no longer
contains an AST2700-specific dependency.
Also validate that the SCU link has been provided during device realize
before accessing it.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/hw/arm/aspeed_coprocessor.h | 5 +++--
hw/arm/aspeed_ast27x0-ssp.c | 20 ++++++++++++++++----
hw/arm/aspeed_ast27x0-tsp.c | 20 ++++++++++++++++----
hw/arm/aspeed_coprocessor_common.c | 2 --
4 files changed, 35 insertions(+), 12 deletions(-)
diff --git a/include/hw/arm/aspeed_coprocessor.h b/include/hw/arm/aspeed_coprocessor.h
index ac58a5f424..adfc3c4512 100644
--- a/include/hw/arm/aspeed_coprocessor.h
+++ b/include/hw/arm/aspeed_coprocessor.h
@@ -20,10 +20,8 @@ struct AspeedCoprocessorState {
MemoryRegion *sram;
MemoryRegion sram_alias;
MemoryRegion uart_alias;
- MemoryRegion scu_alias;
Clock *sysclk;
- AspeedSCUState *scu;
AspeedSCUState scuio;
AspeedTimerCtrlState timerctrl;
SerialMM *uart;
@@ -52,6 +50,9 @@ struct Aspeed27x0CoprocessorState {
UnimplementedDeviceState otp;
ARMv7MState armv7m;
+
+ MemoryRegion scu_alias;
+ Aspeed2700SCUState *scu;
};
#define TYPE_ASPEED27X0SSP_COPROCESSOR "aspeed27x0ssp-coprocessor"
diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
index 68a8ab26f7..28bb59c8c5 100644
--- a/hw/arm/aspeed_ast27x0-ssp.c
+++ b/hw/arm/aspeed_ast27x0-ssp.c
@@ -167,6 +167,12 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
return;
}
+ if (!a->scu) {
+ error_setg(errp, TYPE_ASPEED27X0SSP_COPROCESSOR
+ ": 'scu' link is not set");
+ return;
+ }
+
/* AST27X0 SSP Core */
armv7m = DEVICE(&a->armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 256);
@@ -195,11 +201,11 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
&s->sram_alias);
/* SCU */
- memory_region_init_alias(&s->scu_alias, OBJECT(s), "scu.alias",
- &s->scu->iomem, 0,
- memory_region_size(&s->scu->iomem));
+ memory_region_init_alias(&a->scu_alias, OBJECT(a), "scu.alias",
+ &a->scu->parent_obj.iomem, 0,
+ memory_region_size(&a->scu->parent_obj.iomem));
memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCU],
- &s->scu_alias);
+ &a->scu_alias);
/* INTC */
if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) {
@@ -275,6 +281,11 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
sc->memmap[ASPEED_DEV_OTP], 0x800);
}
+static const Property aspeed_27x0_coprocessor_properties[] = {
+ DEFINE_PROP_LINK("scu", Aspeed27x0CoprocessorState, scu,
+ TYPE_ASPEED_2700_SCU, Aspeed2700SCUState *),
+};
+
static void aspeed_soc_ast27x0ssp_class_init(ObjectClass *klass,
const void *data)
{
@@ -288,6 +299,7 @@ static void aspeed_soc_ast27x0ssp_class_init(ObjectClass *klass,
/* Reason: The Aspeed Coprocessor can only be instantiated from a board */
dc->user_creatable = false;
dc->realize = aspeed_soc_ast27x0ssp_realize;
+ device_class_set_props(dc, aspeed_27x0_coprocessor_properties);
sc->valid_cpu_types = valid_cpu_types;
sc->irqmap = aspeed_soc_ast27x0ssp_irqmap;
diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c
index b8a4f7c91d..f5c4a02161 100644
--- a/hw/arm/aspeed_ast27x0-tsp.c
+++ b/hw/arm/aspeed_ast27x0-tsp.c
@@ -167,6 +167,12 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp)
return;
}
+ if (!a->scu) {
+ error_setg(errp, TYPE_ASPEED27X0TSP_COPROCESSOR
+ ": 'scu' link is not set");
+ return;
+ }
+
/* AST27X0 TSP Core */
armv7m = DEVICE(&a->armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 256);
@@ -195,11 +201,11 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp)
&s->sram_alias);
/* SCU */
- memory_region_init_alias(&s->scu_alias, OBJECT(s), "scu.alias",
- &s->scu->iomem, 0,
- memory_region_size(&s->scu->iomem));
+ memory_region_init_alias(&a->scu_alias, OBJECT(a), "scu.alias",
+ &a->scu->parent_obj.iomem, 0,
+ memory_region_size(&a->scu->parent_obj.iomem));
memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCU],
- &s->scu_alias);
+ &a->scu_alias);
/* INTC */
if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) {
@@ -275,6 +281,11 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp)
sc->memmap[ASPEED_DEV_OTP], 0x800);
}
+static const Property aspeed_27x0_coprocessor_properties[] = {
+ DEFINE_PROP_LINK("scu", Aspeed27x0CoprocessorState, scu,
+ TYPE_ASPEED_2700_SCU, Aspeed2700SCUState *),
+};
+
static void aspeed_soc_ast27x0tsp_class_init(ObjectClass *klass,
const void *data)
{
@@ -288,6 +299,7 @@ static void aspeed_soc_ast27x0tsp_class_init(ObjectClass *klass,
/* Reason: The Aspeed Coprocessor can only be instantiated from a board */
dc->user_creatable = false;
dc->realize = aspeed_soc_ast27x0tsp_realize;
+ device_class_set_props(dc, aspeed_27x0_coprocessor_properties);
sc->valid_cpu_types = valid_cpu_types;
sc->irqmap = aspeed_soc_ast27x0tsp_irqmap;
diff --git a/hw/arm/aspeed_coprocessor_common.c b/hw/arm/aspeed_coprocessor_common.c
index a0a4c73d08..43026d2a55 100644
--- a/hw/arm/aspeed_coprocessor_common.c
+++ b/hw/arm/aspeed_coprocessor_common.c
@@ -27,8 +27,6 @@ static const Property aspeed_coprocessor_properties[] = {
TYPE_MEMORY_REGION, MemoryRegion *),
DEFINE_PROP_LINK("sram", AspeedCoprocessorState, sram, TYPE_MEMORY_REGION,
MemoryRegion *),
- DEFINE_PROP_LINK("scu", AspeedCoprocessorState, scu, TYPE_ASPEED_SCU,
- AspeedSCUState *),
DEFINE_PROP_LINK("uart", AspeedCoprocessorState, uart, TYPE_SERIAL_MM,
SerialMM *),
DEFINE_PROP_INT32("uart-dev", AspeedCoprocessorState, uart_dev, 0),
--
2.43.0
next prev parent reply other threads:[~2026-07-17 8:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-17 8:46 [PATCH v4 0/9] Refactor AST2700 SCU preparation for coprocessors Jamin Lin
2026-07-17 8:46 ` [PATCH v4 1/9] hw/misc/aspeed_scu: Introduce Aspeed2700SCUState Jamin Lin
2026-07-17 8:46 ` [PATCH v4 2/9] hw/arm/aspeed: Use Aspeed2700SCUState for AST2700 users Jamin Lin
2026-07-17 8:46 ` Jamin Lin [this message]
2026-07-17 8:46 ` [PATCH v4 4/9] hw/misc/aspeed_scu: Add separate reset handler for AST2700 SCUIO Jamin Lin
2026-07-17 8:46 ` [PATCH v4 5/9] hw/arm/aspeed_ast27x0: Pass realized PSP SoC to SSP/TSP initialization Jamin Lin
2026-07-17 8:46 ` [PATCH v4 6/9] hw/arm/ast27x0: Share single SCUIO instance across PSP, SSP, and TSP Jamin Lin
2026-07-17 8:46 ` [PATCH v4 7/9] hw/arm/ast27x0: Share FMC controller with SSP " Jamin Lin
2026-07-17 8:46 ` [PATCH v4 8/9] hw/ssi/aspeed_smc: Add Data FIFO-based flash access support for AST2700 Jamin Lin
2026-07-17 8:46 ` [PATCH v4 9/9] tests/qtest/ast2700-smc-test: Add Data FIFO mode test Jamin Lin
2026-07-17 9:52 ` Cédric Le Goater
2026-07-17 10:06 ` [PATCH v4 0/9] Refactor AST2700 SCU preparation for coprocessors Cédric Le Goater
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