From: Simon Xu <simonxhy0404@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Owen Giles <owen.giles@hpe.com>,
Peter Maydell <peter.maydell@linaro.org>,
Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>,
Robert Elliott <elliott@hpe.com>,
Simon Xu <simonxhy0404@gmail.com>
Subject: [PATCH v2 7/9] hw/misc/iotkit-sysinfo.c: add SSE-310 support
Date: Wed, 5 Aug 2026 10:30:03 -0500 [thread overview]
Message-ID: <20260805153005.9989-8-simonxhy0404@gmail.com> (raw)
In-Reply-To: <20260805153005.9989-1-simonxhy0404@gmail.com>
Add SSE-310 PIDR and CIDR registers. Add sys_config2 register and
always report 0 on read as we do not implement the NPU.
Reviewed-by: Owen Giles <owen.giles@hpe.com>
Reviewed-by: Robert Elliott <elliott@hpe.com>
Signed-off-by: Simon Xu <simonxhy0404@gmail.com>
---
v1 -> v2
Hard code sys_config2 to return 0 as we don't implement NPU0
---
hw/misc/iotkit-sysinfo.c | 22 +++++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/hw/misc/iotkit-sysinfo.c b/hw/misc/iotkit-sysinfo.c
index 19f089e6ee..f3d07f3247 100644
--- a/hw/misc/iotkit-sysinfo.c
+++ b/hw/misc/iotkit-sysinfo.c
@@ -31,6 +31,7 @@
REG32(SYS_VERSION, 0x0)
REG32(SYS_CONFIG, 0x4)
REG32(SYS_CONFIG1, 0x8)
+REG32(SYS_CONFIG2, 0xc)
REG32(IIDR, 0xfc8)
REG32(PID4, 0xfd0)
REG32(PID5, 0xfd4)
@@ -58,6 +59,12 @@ static const int sysinfo_sse300_id[] = {
0x0d, 0xf0, 0x05, 0xb1, /* CID0..CID3 */
};
+static const int sysinfo_sse310_id[] = {
+ 0x04, 0x00, 0x00, 0x00, /* PID4..PID7 */
+ 0x58, 0xb8, 0x2b, 0x00, /* PID0..PID3 */
+ 0x0d, 0xf0, 0x05, 0xb1, /* CID0..CID3 */
+};
+
static uint64_t iotkit_sysinfo_read(void *opaque, hwaddr offset,
unsigned size)
{
@@ -68,13 +75,22 @@ static uint64_t iotkit_sysinfo_read(void *opaque, hwaddr offset,
case A_SYS_VERSION:
r = s->sys_version;
break;
-
case A_SYS_CONFIG:
r = s->sys_config;
break;
case A_SYS_CONFIG1:
switch (s->sse_version) {
case ARMSSE_SSE300:
+ case ARMSSE_SSE310:
+ return 0;
+ break;
+ default:
+ goto bad_read;
+ }
+ break;
+ case A_SYS_CONFIG2:
+ switch (s->sse_version) {
+ case ARMSSE_SSE310:
return 0;
break;
default:
@@ -84,6 +100,7 @@ static uint64_t iotkit_sysinfo_read(void *opaque, hwaddr offset,
case A_IIDR:
switch (s->sse_version) {
case ARMSSE_SSE300:
+ case ARMSSE_SSE310:
return s->iidr;
break;
default:
@@ -95,6 +112,9 @@ static uint64_t iotkit_sysinfo_read(void *opaque, hwaddr offset,
case ARMSSE_SSE300:
r = sysinfo_sse300_id[(offset - A_PID4) / 4];
break;
+ case ARMSSE_SSE310:
+ r = sysinfo_sse310_id[(offset - A_PID4) / 4];
+ break;
default:
r = sysinfo_id[(offset - A_PID4) / 4];
break;
--
2.53.0
next prev parent reply other threads:[~2026-08-05 15:32 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-05 15:29 [PATCH v2 0/9] arm: add Cortex-M85, SSE-310, and mps3-an555 Simon Xu
2026-08-05 15:29 ` [PATCH v2 1/9] target/arm/tcg/cpu-v7m.c: add cortex-m85 model Simon Xu
2026-08-05 15:29 ` [PATCH v2 2/9] hw/arm/armsse: add Arm Corstone SSE-310 Simon Xu
2026-08-17 15:23 ` Peter Maydell
2026-08-05 15:29 ` [PATCH v2 3/9] hw/misc/iotkit-sysctl.c: add SSE-310 support Simon Xu
2026-08-17 15:30 ` Peter Maydell
2026-08-05 15:30 ` [PATCH v2 4/9] hw/misc/iotkit-secctl.c: fix AHB secure read Simon Xu
2026-08-17 15:33 ` Peter Maydell
2026-08-05 15:30 ` [PATCH v2 5/9] hw/misc/iotkit-secctl.c: add SSE-310 support Simon Xu
2026-08-17 15:34 ` Peter Maydell
2026-08-05 15:30 ` [PATCH v2 6/9] hw/misc/iotkit-secctl.c: use GNU C case ranges Simon Xu
2026-08-17 15:38 ` Peter Maydell
2026-08-05 15:30 ` Simon Xu [this message]
2026-08-17 15:38 ` [PATCH v2 7/9] hw/misc/iotkit-sysinfo.c: add SSE-310 support Peter Maydell
2026-08-05 15:30 ` [PATCH v2 8/9] hw/arm/mps2-tz.c add Arm mps3-an555 board Simon Xu
2026-08-17 15:50 ` Peter Maydell
2026-08-05 15:30 ` [PATCH v2 9/9] hw/misc/mps2-fpgaio.c: add GPIOALT2 register Simon Xu
2026-08-17 15:49 ` Peter Maydell
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