From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Fabiano Rosas" <farosas@suse.de>,
"Laurent Vivier" <lvivier@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>
Subject: [PATCH v1 4/5] hw/arm/aspeed_ast2600: Wire up the ACRY model
Date: Thu, 13 Aug 2026 06:24:06 +0000 [thread overview]
Message-ID: <20260813062359.425268-5-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260813062359.425268-1-jamin_lin@aspeedtech.com>
Instantiate the new ACRY model on the AST2600 SoC using its
real-silicon register address and IRQ:
- ACRY register region 0x1e6fa000-0x1e6fafff
- IRQ 160
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast2600.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 3d1cd8e2d7..2c96700a92 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -52,6 +52,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
[ASPEED_DEV_DP] = 0x1E6EB000,
[ASPEED_DEV_PCIE_PHY1] = 0x1E6ED200,
[ASPEED_DEV_SBC] = 0x1E6F2000,
+ [ASPEED_DEV_ACRY] = 0x1E6FA000,
[ASPEED_DEV_EMMC_BC] = 0x1E6f5000,
[ASPEED_DEV_VIDEO] = 0x1E700000,
[ASPEED_DEV_SDHCI] = 0x1E740000,
@@ -144,6 +145,7 @@ static const int aspeed_soc_ast2600_irqmap[] = {
[ASPEED_DEV_FSI1] = 100,
[ASPEED_DEV_FSI2] = 101,
[ASPEED_DEV_I3C] = 102, /* 102 -> 107 */
+ [ASPEED_DEV_ACRY] = 160,
};
static qemu_irq aspeed_soc_ast2600_get_irq(AspeedSoCState *s, int dev)
@@ -269,6 +271,8 @@ static void aspeed_soc_ast2600_init(Object *obj)
snprintf(typename, sizeof(typename), "aspeed.hace-%s", socname);
object_initialize_child(obj, "hace", &s->hace, typename);
+ object_initialize_child(obj, "acry", &s->acry, TYPE_ASPEED_ACRY);
+
object_initialize_child(obj, "i3c", &s->i3c, TYPE_ASPEED_I3C);
object_initialize_child(obj, "sbc", &s->sbc, TYPE_ASPEED_AST2600_SBC);
@@ -723,6 +727,21 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0,
aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_HACE));
+ /* ACRY */
+ object_property_set_link(OBJECT(&s->acry), "dram", OBJECT(s->dram_mr),
+ &error_abort);
+ object_property_set_link(OBJECT(&s->acry), "sram", OBJECT(&s->sram[1]),
+ &error_abort);
+ qdev_prop_set_uint64(DEVICE(&s->acry), "sram-base",
+ sc->memmap[ASPEED_DEV_SRAM1]);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->acry), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->acry), 0,
+ sc->memmap[ASPEED_DEV_ACRY]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->acry), 0,
+ aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_ACRY));
+
/* I3C */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) {
return;
--
2.43.0
next prev parent reply other threads:[~2026-08-13 6:24 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-13 6:24 [PATCH v1 0/5] Add ASPEED ACRY RSA model for the AST2600 Jamin Lin
2026-08-13 6:24 ` [PATCH v1 1/5] hw/misc/aspeed_acry: Add ASPEED ACRY model Jamin Lin
2026-08-19 19:54 ` Cédric Le Goater
2026-08-20 6:36 ` Jamin Lin
2026-08-13 6:24 ` [PATCH v1 2/5] hw/arm/aspeed_ast2600: Introduce the ACRY SRAM Jamin Lin
2026-08-19 19:55 ` Cédric Le Goater
2026-08-13 6:24 ` [PATCH v1 3/5] hw/arm/aspeed_soc: Add the ACRY model to AspeedSoCState Jamin Lin
2026-08-19 19:56 ` Cédric Le Goater
2026-08-20 1:00 ` Jamin Lin
2026-08-13 6:24 ` Jamin Lin [this message]
2026-08-13 6:24 ` [PATCH v1 5/5] tests/qtest/aspeed-acry-test: Add RSA ModExp tests Jamin Lin
2026-08-19 20:14 ` [PATCH v1 0/5] Add ASPEED ACRY RSA model for the AST2600 Cédric Le Goater
2026-08-20 7:26 ` Jamin Lin
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