From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Daniel P. Berrangé" <berrange@redhat.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>, "Eric Blake" <eblake@redhat.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Fabiano Rosas" <farosas@suse.de>,
"Laurent Vivier" <lvivier@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>
Subject: [PATCH v1 6/8] hw/misc/aspeed_sbc: Increase register space to 0x1000
Date: Tue, 18 Aug 2026 09:23:01 +0000 [thread overview]
Message-ID: <20260818092249.602137-7-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260818092249.602137-1-jamin_lin@aspeedtech.com>
The SBC controller register space is 0x1000.
Increase ASPEED_SBC_NR_REGS accordingly to cover the
full register space.
Bump the VMState version to 2.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/misc/aspeed_sbc.c | 4 ++--
include/hw/misc/aspeed_sbc.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/misc/aspeed_sbc.c b/hw/misc/aspeed_sbc.c
index 724f4cb06c..951dde5126 100644
--- a/hw/misc/aspeed_sbc.c
+++ b/hw/misc/aspeed_sbc.c
@@ -464,8 +464,8 @@ static void aspeed_sbc_realize(DeviceState *dev, Error **errp)
static const VMStateDescription vmstate_aspeed_sbc = {
.name = TYPE_ASPEED_SBC,
- .version_id = 1,
- .minimum_version_id = 1,
+ .version_id = 2,
+ .minimum_version_id = 2,
.fields = (const VMStateField[]) {
VMSTATE_UINT32_ARRAY(regs, AspeedSBCState, ASPEED_SBC_NR_REGS),
VMSTATE_END_OF_LIST(),
diff --git a/include/hw/misc/aspeed_sbc.h b/include/hw/misc/aspeed_sbc.h
index 9b04a10aed..e37c3a12dd 100644
--- a/include/hw/misc/aspeed_sbc.h
+++ b/include/hw/misc/aspeed_sbc.h
@@ -17,7 +17,7 @@
#define TYPE_ASPEED_AST10X0_SBC TYPE_ASPEED_SBC "-ast10x0"
OBJECT_DECLARE_TYPE(AspeedSBCState, AspeedSBCClass, ASPEED_SBC)
-#define ASPEED_SBC_NR_REGS (0x93c >> 2)
+#define ASPEED_SBC_NR_REGS (0x1000 >> 2)
#define QSR_AES BIT(27)
#define QSR_RSA1024 (0x0 << 12)
--
2.53.0
next prev parent reply other threads:[~2026-08-18 9:25 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-18 9:22 [PATCH v1 0/8] Add ECDSA akcipher support and the ASPEED SBC ECDSA engine for AST10x0 Jamin Lin
2026-08-18 9:22 ` [PATCH v1 1/8] qapi/crypto: Add ECDSA algorithm and curve id Jamin Lin
2026-08-20 9:07 ` Markus Armbruster
2026-08-21 2:53 ` Jamin Lin
2026-08-18 9:22 ` [PATCH v1 2/8] crypto/akcipher: Support ECDSA sign/verify with gcrypt Jamin Lin
2026-08-18 9:22 ` [PATCH v1 3/8] crypto/akcipher: Support ECDSA sign/verify with nettle Jamin Lin
2026-08-18 9:22 ` [PATCH v1 4/8] tests/crypto: Add ECDSA sign/verify tests Jamin Lin
2026-08-18 9:22 ` [PATCH v1 5/8] hw/misc/aspeed_sbc: Support the ECDSA verify command Jamin Lin
2026-08-19 20:03 ` Cédric Le Goater
2026-08-20 0:49 ` Jamin Lin
2026-08-18 9:23 ` Jamin Lin [this message]
2026-08-18 9:23 ` [PATCH v1 7/8] hw/arm/aspeed_ast10x0: Wire SEC SRAM to the SBC model Jamin Lin
2026-08-18 9:23 ` [PATCH v1 8/8] tests/qtest: Add ASPEED SBC ECDSA engine test Jamin Lin
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