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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482b10fcebdsm15612963f8f.0.2026.08.20.13.14.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 20 Aug 2026 13:14:37 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, Peter Maydell , Paolo Bonzini , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, Pierrick Bouvier , qemu-arm@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Zhao Liu Subject: [PATCH v2 05/15] target/i386: Constify CPU*State for cpu_*_interrupt() getters Date: Thu, 20 Aug 2026 22:13:45 +0200 Message-ID: <20260820201356.29775-6-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260820201356.29775-1-philmd@oss.qualcomm.com> References: <20260820201356.29775-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYwODIwMDE1MiBTYWx0ZWRfXzLDdGHz3N0My /4mp4KvMG+C4Jr4WU0Iva5PWsAnV2te4Dt5tA9pHPRi9hSzt4UGPixKZm2OK3wPzM3NbxaRZU9z 8Yp4Bj/xC+BGoxttaqkLZYnj3793MKc= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODIwMDE1MiBTYWx0ZWRfX0INKSG3erfJ4 sgInNHbTi3orERFXmEcUT2hkvJtRTe1mFhlcDpxJ13hhAEtdT3Qq83Z2dNPn/Vm8NCOFXlPXdVh YlpcszFk2BHOLsYQLqzc0/L7BavB6hUq2rAMaiKgQNnpxCaXfo32Et9pqtcjQPcPvdwRQmAbxMk swjVEyQL+X4nQ2u5CejHr1s07mnaZcm5DU66lIrJo9UYYh19vzfyoJ6LlQZDRLIhjYe5jEIgQ6h 4+3xKzJEe7Eth/Ki0fQ2H/rKZZlp/82kIlf3CiXzq5tajoefnVxIWjLQzV/xv5zLf1KGz32evXx QGmqEkf3Gct2iqaVHOGaAHubyV0+ym37vVyTq8rzfidwnZccyXUwlSo8B2dD4KNbS04jufltCvB D4Euh/AaIseCCcRq2W5nfXfMBBye20szcpCQKgcNAPk+0XIAqHRYQMkchpxPyeY22KLOh6y5oUT MfGPBy2xoyPSxnGfDJg== X-Authority-Analysis: v=2.4 cv=Y7/IdBeN c=1 sm=1 tr=0 ts=6a876030 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=20KFwNOVAAAA:8 a=tlxghdvPRZsVr19qFskA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 X-Proofpoint-GUID: j95bwpkz0isluq66IHCxl6_rHFYJs0N_ X-Proofpoint-ORIG-GUID: j95bwpkz0isluq66IHCxl6_rHFYJs0N_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-20_02,2026-08-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 adultscore=0 clxscore=1015 phishscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608200152 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org x86_cpu_pending_interrupt() and x86_cpu_interrupts_enabled() only read CPU state without modification, add the const qualifiers to CPUState and CPUX86State parameters. Simplify directly using cpu_env() in x86_cpu_pending_interrupt. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau --- target/i386/cpu.h | 4 ++-- target/i386/cpu.c | 5 ++--- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index e6a197602d8..72adf075bfd 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2584,7 +2584,7 @@ void x86_cpu_gdb_init(CPUState *cs); int cpu_x86_support_mca_broadcast(CPUX86State *env); #ifndef CONFIG_USER_ONLY -int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request); +int x86_cpu_pending_interrupt(const CPUState *cs, int interrupt_request); bool x86_cpu_translate_for_debug(CPUState *cpu, vaddr addr, TranslateForDebugResult *result); @@ -3092,7 +3092,7 @@ static inline bool ctl_has_irq(CPUX86State *env) return (env->int_ctl & V_IRQ_MASK) && (int_prio >= tpr); } -static inline bool x86_cpu_interrupts_enabled(CPUX86State *env) +static inline bool x86_cpu_interrupts_enabled(const CPUX86State *env) { return ((env->eflags & IF_MASK) && !(env->hflags & HF_INHIBIT_IRQ_MASK)) || diff --git a/target/i386/cpu.c b/target/i386/cpu.c index e5ffb10d156..1fc02cf94e6 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -10601,10 +10601,9 @@ static vaddr x86_cpu_get_pc(CPUState *cs) } #if !defined(CONFIG_USER_ONLY) -int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request) +int x86_cpu_pending_interrupt(const CPUState *cs, int interrupt_request) { - X86CPU *cpu = X86_CPU(cs); - CPUX86State *env = &cpu->env; + const CPUX86State *env = cpu_env(cs); if (interrupt_request & CPU_INTERRUPT_POLL) { return CPU_INTERRUPT_POLL; -- 2.53.0