From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: "Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
qemu-ppc@nongnu.org, qemu-s390x@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>,
qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
"Michael Rolnik" <mrolnik@gmail.com>,
"Helge Deller" <deller@gmx.de>,
"Philippe Mathieu-Daudé" <philmd@mailo.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Aleksandar Rikalo" <arikalo@gmail.com>,
"Chinmay Rath" <rathc@linux.ibm.com>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Glenn Miles" <milesg@linux.ibm.com>,
"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"Daniel Henrique Barboza" <daniel.barboza@oss.qualcomm.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Chao Liu" <chao.liu@processmission.com>,
"Yoshinori Sato" <yoshinori.sato@nifty.com>,
"Ilya Leoshkevich" <iii@linux.ibm.com>,
"David Hildenbrand" <david@kernel.org>,
"Cornelia Huck" <cohuck@redhat.com>,
"Eric Farman" <farman@linux.ibm.com>,
"Matthew Rosato" <mjrosato@linux.ibm.com>,
"Artyom Tarasenko" <atar4qemu@gmail.com>,
"Max Filippov" <jcmvbkbc@gmail.com>
Subject: [RFC PATCH v3 10/11] targets: Move BQL locking into do_interrupt() handlers
Date: Wed, 2 Sep 2026 17:20:41 +0200 [thread overview]
Message-ID: <20260902152044.31291-11-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20260902152044.31291-1-philmd@oss.qualcomm.com>
Migrate 13 targets to acquire the BQL explicitly within their
do_interrupt() implementations instead of relying on the TCG core
to hold it. This allows per-target control over locking granularity
and paves the way for fine-grained BQL optimization.
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
target/alpha/cpu.c | 2 +-
target/alpha/helper.c | 3 +++
target/arm/cpu.c | 2 +-
target/arm/helper.c | 1 +
target/arm/tcg/cpu-v7m.c | 2 +-
target/arm/tcg/m_helper.c | 2 ++
target/avr/cpu.c | 2 +-
target/avr/helper.c | 3 +++
target/hppa/cpu.c | 2 +-
target/hppa/int_helper.c | 2 ++
target/i386/tcg/system/seg_helper.c | 2 ++
target/i386/tcg/tcg-cpu.c | 2 +-
target/mips/cpu.c | 2 +-
target/mips/tcg/system/tlb_helper.c | 3 +++
target/ppc/cpu_init.c | 2 +-
target/ppc/excp_helper.c | 2 ++
target/riscv/tcg/tcg-cpu.c | 2 +-
target/rx/cpu.c | 2 +-
target/rx/helper.c | 3 +++
target/s390x/cpu.c | 2 +-
target/s390x/tcg/excp_helper.c | 3 +++
target/sh4/cpu.c | 2 +-
target/sh4/helper.c | 3 +++
target/sparc/cpu.c | 2 +-
target/sparc/int32_helper.c | 2 ++
target/sparc/int64_helper.c | 2 ++
target/xtensa/cpu.c | 2 +-
target/xtensa/exc_helper.c | 2 ++
28 files changed, 47 insertions(+), 14 deletions(-)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index aca9e82bfb2..12e86021663 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -267,7 +267,7 @@ static const TCGCPUOps alpha_tcg_ops = {
.cpu_exec_interrupt = alpha_cpu_exec_interrupt,
.cpu_exec_halt = alpha_cpu_has_work,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = alpha_cpu_do_interrupt,
+ .do_interrupt = alpha_cpu_do_interrupt,
.do_transaction_failed = alpha_cpu_do_transaction_failed,
.do_unaligned_access = alpha_cpu_do_unaligned_access,
#endif /* !CONFIG_USER_ONLY */
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index c3614ecafda..e21cd8e2b44 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -26,6 +26,7 @@
#include "fpu/softfloat-types.h"
#include "fpu/softfloat-helpers.h"
#include "exec/helper-proto.h"
+#include "qemu/main-loop.h"
#include "qemu/qemu-print.h"
#include "system/memory.h"
#include "accel/tcg/cpu-loop.h"
@@ -341,6 +342,8 @@ void alpha_cpu_do_interrupt(CPUState *cs)
int i = cs->exception_index;
uint64_t last_pc = env->pc;
+ BQL_LOCK_GUARD();
+
if (qemu_loglevel_mask(CPU_LOG_INT)) {
static int count;
const char *name = "<unknown>";
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 0d0555b7ad4..77aa78f00e2 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2606,7 +2606,7 @@ static const TCGCPUOps arm_tcg_ops = {
.cpu_exec_interrupt = arm_cpu_exec_interrupt,
.cpu_exec_halt = arm_cpu_exec_halt,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = arm_cpu_do_interrupt,
+ .do_interrupt = arm_cpu_do_interrupt,
.do_transaction_failed = arm_cpu_do_transaction_failed,
.do_unaligned_access = arm_cpu_do_unaligned_access,
.adjust_watchpoint_address = arm_adjust_watchpoint_address,
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c3f607e6d6b..fbedb3fa39c 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9714,6 +9714,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
uint64_t last_pc = cs->cc->get_pc(cs);
assert(!arm_feature(env, ARM_FEATURE_M));
+ BQL_LOCK_GUARD();
arm_log_exception(cs);
qemu_log_mask(CPU_LOG_INT, "...from EL%d to EL%d\n", arm_current_el(env),
diff --git a/target/arm/tcg/cpu-v7m.c b/target/arm/tcg/cpu-v7m.c
index 1f698b70283..502998dbd1c 100644
--- a/target/arm/tcg/cpu-v7m.c
+++ b/target/arm/tcg/cpu-v7m.c
@@ -304,7 +304,7 @@ static const TCGCPUOps arm_v7m_tcg_ops = {
.cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt,
.cpu_exec_halt = arm_cpu_exec_halt,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = arm_v7m_cpu_do_interrupt,
+ .do_interrupt = arm_v7m_cpu_do_interrupt,
.do_transaction_failed = arm_cpu_do_transaction_failed,
.do_unaligned_access = arm_cpu_do_unaligned_access,
.adjust_watchpoint_address = arm_adjust_watchpoint_address,
diff --git a/target/arm/tcg/m_helper.c b/target/arm/tcg/m_helper.c
index 33c9e7c55bc..9e15781f08d 100644
--- a/target/arm/tcg/m_helper.c
+++ b/target/arm/tcg/m_helper.c
@@ -2214,6 +2214,8 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
bool ignore_stackfaults;
uint64_t last_pc = env->regs[15];
+ BQL_LOCK_GUARD();
+
arm_log_exception(cs);
/*
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index bc7639031b8..f8409f32ab9 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -249,7 +249,7 @@ static const TCGCPUOps avr_tcg_ops = {
.cpu_exec_halt = avr_cpu_has_work,
.cpu_exec_reset = cpu_reset,
.tlb_fill = avr_cpu_tlb_fill,
- .do_interrupt_locked = avr_cpu_do_interrupt,
+ .do_interrupt = avr_cpu_do_interrupt,
/*
* TODO: code and data wrapping are different, but for the most part
* AVR only references bytes or aligned code fetches. But we use
diff --git a/target/avr/helper.c b/target/avr/helper.c
index f452c9d9040..ed839b6db31 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "qemu/error-report.h"
+#include "qemu/main-loop.h"
#include "cpu.h"
#include "accel/tcg/cpu-ops.h"
#include "accel/tcg/cpu-loop.h"
@@ -89,6 +90,8 @@ void avr_cpu_do_interrupt(CPUState *cs)
vector = ctz64(env->intsrc) + 1;
}
+ BQL_LOCK_GUARD();
+
if (avr_feature(env, AVR_FEATURE_3_BYTE_PC)) {
do_stb(env, env->sp--, ret, 0);
do_stb(env, env->sp--, ret >> 8, 0);
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index c6d915d314f..07b49e51326 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -272,7 +272,7 @@ static const TCGCPUOps hppa_tcg_ops = {
.cpu_exec_interrupt = hppa_cpu_exec_interrupt,
.cpu_exec_halt = hppa_cpu_has_work,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = hppa_cpu_do_interrupt,
+ .do_interrupt = hppa_cpu_do_interrupt,
.do_unaligned_access = hppa_cpu_do_unaligned_access,
.do_transaction_failed = hppa_cpu_do_transaction_failed,
#endif /* !CONFIG_USER_ONLY */
diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c
index 3e87b9a0011..852d0649d84 100644
--- a/target/hppa/int_helper.c
+++ b/target/hppa/int_helper.c
@@ -98,6 +98,8 @@ void hppa_cpu_do_interrupt(CPUState *cs)
uint64_t old_psw, old_gva_offset_mask;
uint64_t last_pc = cs->cc->get_pc(cs);
+ BQL_LOCK_GUARD();
+
/* As documented in pa2.0 -- interruption handling. */
/* step 1 */
env->cr[CR_IPSW] = old_psw = cpu_hppa_get_psw(env);
diff --git a/target/i386/tcg/system/seg_helper.c b/target/i386/tcg/system/seg_helper.c
index 8c7856be81e..8eaeb746128 100644
--- a/target/i386/tcg/system/seg_helper.c
+++ b/target/i386/tcg/system/seg_helper.c
@@ -115,6 +115,8 @@ void x86_cpu_do_interrupt(CPUState *cs)
X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env;
+ BQL_LOCK_GUARD();
+
if (cs->exception_index == EXCP_VMEXIT) {
assert(env->old_exception == -1);
do_vmexit(env);
diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c
index ff65641654d..7a4d73e7fee 100644
--- a/target/i386/tcg/tcg-cpu.c
+++ b/target/i386/tcg/tcg-cpu.c
@@ -179,7 +179,7 @@ const TCGCPUOps x86_tcg_ops = {
#else
.tlb_fill = x86_cpu_tlb_fill,
.pointer_wrap = x86_pointer_wrap,
- .do_interrupt_locked = x86_cpu_do_interrupt,
+ .do_interrupt = x86_cpu_do_interrupt,
.cpu_exec_halt = x86_cpu_exec_halt,
.cpu_exec_interrupt = x86_cpu_exec_interrupt,
.cpu_exec_reset = x86_cpu_exec_reset,
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 073e466b713..0fead20d651 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -718,7 +718,7 @@ static const TCGCPUOps mips_tcg_ops = {
.cpu_exec_interrupt = mips_cpu_exec_interrupt,
.cpu_exec_halt = mips_cpu_has_work,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = mips_cpu_do_interrupt,
+ .do_interrupt = mips_cpu_do_interrupt,
.do_transaction_failed = mips_cpu_do_transaction_failed,
.do_unaligned_access = mips_cpu_do_unaligned_access,
.io_recompile_replay_branch = mips_io_recompile_replay_branch,
diff --git a/target/mips/tcg/system/tlb_helper.c b/target/mips/tcg/system/tlb_helper.c
index 4398c6f80b4..2b8478f9a9d 100644
--- a/target/mips/tcg/system/tlb_helper.c
+++ b/target/mips/tcg/system/tlb_helper.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
#include "qemu/bitops.h"
+#include "qemu/main-loop.h"
#include "qemu/plugin.h"
#include "cpu.h"
@@ -1045,6 +1046,8 @@ void mips_cpu_do_interrupt(CPUState *cs)
int cause = -1;
uint64_t last_pc = env->active_tc.PC;
+ BQL_LOCK_GUARD();
+
if (qemu_loglevel_mask(CPU_LOG_INT)
&& cs->exception_index != EXCP_EXT_INTERRUPT) {
qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 2676562b2f1..6c626843c93 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7498,7 +7498,7 @@ static const TCGCPUOps ppc_tcg_ops = {
.cpu_exec_interrupt = ppc_cpu_exec_interrupt,
.cpu_exec_halt = ppc_cpu_has_work,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = ppc_cpu_do_interrupt,
+ .do_interrupt = ppc_cpu_do_interrupt,
.cpu_exec_enter = ppc_cpu_exec_enter,
.cpu_exec_exit = ppc_cpu_exec_exit,
.do_unaligned_access = ppc_cpu_do_unaligned_access,
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 6d05b865058..6352a4fcaf3 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1761,6 +1761,8 @@ void ppc_cpu_do_interrupt(CPUState *cs)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
+ BQL_LOCK_GUARD();
+
powerpc_excp(cpu, cs->exception_index);
}
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index ea3189ab3d2..9e3cc87f8a3 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -289,7 +289,7 @@ const TCGCPUOps riscv_tcg_ops = {
.cpu_exec_interrupt = riscv_cpu_exec_interrupt,
.cpu_exec_halt = riscv_cpu_has_work,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = riscv_cpu_do_interrupt,
+ .do_interrupt = riscv_cpu_do_interrupt,
.do_transaction_failed = riscv_cpu_do_transaction_failed,
.do_unaligned_access = riscv_cpu_do_unaligned_access,
.debug_excp_handler = riscv_cpu_debug_excp_handler,
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index ea58a804154..9b8473d71cf 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -229,7 +229,7 @@ static const TCGCPUOps rx_tcg_ops = {
.cpu_exec_interrupt = rx_cpu_exec_interrupt,
.cpu_exec_halt = rx_cpu_has_work,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = rx_cpu_do_interrupt,
+ .do_interrupt = rx_cpu_do_interrupt,
};
static void rx_cpu_class_init(ObjectClass *klass, const void *data)
diff --git a/target/rx/helper.c b/target/rx/helper.c
index 0f99279bbaa..784193ebd40 100644
--- a/target/rx/helper.c
+++ b/target/rx/helper.c
@@ -18,6 +18,7 @@
#include "qemu/osdep.h"
#include "qemu/bitops.h"
+#include "qemu/main-loop.h"
#include "cpu.h"
#include "exec/log.h"
#include "accel/tcg/cpu-ldst.h"
@@ -47,6 +48,8 @@ void rx_cpu_do_interrupt(CPUState *cs)
uint32_t save_psw;
uint64_t last_pc = env->pc;
+ BQL_LOCK_GUARD();
+
env->in_sleep = 0;
if (env->psw_u) {
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 053eafaa842..7c725b8a4a4 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -386,7 +386,7 @@ static const TCGCPUOps s390_tcg_ops = {
.cpu_exec_interrupt = s390_cpu_exec_interrupt,
.cpu_exec_halt = s390_cpu_has_work,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = s390_cpu_do_interrupt,
+ .do_interrupt = s390_cpu_do_interrupt,
.debug_excp_handler = s390x_cpu_debug_excp_handler,
.do_unaligned_access = s390x_cpu_do_unaligned_access,
#endif /* !CONFIG_USER_ONLY */
diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c
index 01c0d77b13b..d39d41bfcf3 100644
--- a/target/s390x/tcg/excp_helper.c
+++ b/target/s390x/tcg/excp_helper.c
@@ -28,6 +28,7 @@
#include "s390x-internal.h"
#include "tcg_s390x.h"
#ifndef CONFIG_USER_ONLY
+#include "qemu/main-loop.h"
#include "qemu/timer.h"
#include "system/address-spaces.h"
#include "system/memory.h"
@@ -503,6 +504,8 @@ void s390_cpu_do_interrupt(CPUState *cs)
bool stopped = false;
uint64_t last_pc = cpu->env.psw.addr;
+ BQL_LOCK_GUARD();
+
qemu_log_mask(CPU_LOG_INT, "%s: %d at psw=%" PRIx64 ":%" PRIx64 "\n",
__func__, cs->exception_index, env->psw.mask, env->psw.addr);
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index fdab5106b27..3bbdee301d5 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -314,7 +314,7 @@ static const TCGCPUOps superh_tcg_ops = {
.cpu_exec_interrupt = superh_cpu_exec_interrupt,
.cpu_exec_halt = superh_cpu_has_work,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = superh_cpu_do_interrupt,
+ .do_interrupt = superh_cpu_do_interrupt,
.do_unaligned_access = superh_cpu_do_unaligned_access,
.io_recompile_replay_branch = superh_io_recompile_replay_branch,
#endif /* !CONFIG_USER_ONLY */
diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index b6b057f104b..1d854262d13 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -28,6 +28,7 @@
#include "qemu/plugin.h"
#if !defined(CONFIG_USER_ONLY)
+#include "qemu/main-loop.h"
#include "hw/sh4/sh_intc.h"
#include "system/runstate.h"
#endif
@@ -64,6 +65,8 @@ void superh_cpu_do_interrupt(CPUState *cs)
int do_exp, irq_vector = cs->exception_index;
uint64_t last_pc = env->pc;
+ BQL_LOCK_GUARD();
+
/* prioritize exceptions over interrupts */
do_exp = cs->exception_index != -1;
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 23fd0a5e3fe..ae9bdca9df8 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -1076,7 +1076,7 @@ static const TCGCPUOps sparc_tcg_ops = {
.cpu_exec_interrupt = sparc_cpu_exec_interrupt,
.cpu_exec_halt = sparc_cpu_has_work,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = sparc_cpu_do_interrupt,
+ .do_interrupt = sparc_cpu_do_interrupt,
.do_transaction_failed = sparc_cpu_do_transaction_failed,
.do_unaligned_access = sparc_cpu_do_unaligned_access,
#endif /* !CONFIG_USER_ONLY */
diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c
index d6bb3fa1e54..3eea824c9a3 100644
--- a/target/sparc/int32_helper.c
+++ b/target/sparc/int32_helper.c
@@ -105,6 +105,8 @@ void sparc_cpu_do_interrupt(CPUState *cs)
CPUSPARCState *env = cpu_env(cs);
int cwp, intno = cs->exception_index;
+ BQL_LOCK_GUARD();
+
if (qemu_loglevel_mask(CPU_LOG_INT)) {
static int count;
const char *name;
diff --git a/target/sparc/int64_helper.c b/target/sparc/int64_helper.c
index 60ab0478fc6..e26d3ac5142 100644
--- a/target/sparc/int64_helper.c
+++ b/target/sparc/int64_helper.c
@@ -138,6 +138,8 @@ void sparc_cpu_do_interrupt(CPUState *cs)
int intno = cs->exception_index;
trap_state *tsptr;
+ BQL_LOCK_GUARD();
+
#ifdef DEBUG_PCALL
if (qemu_loglevel_mask(CPU_LOG_INT)) {
static int count;
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index e980a13eadd..7c25b9ab707 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -327,7 +327,7 @@ static const TCGCPUOps xtensa_tcg_ops = {
.cpu_exec_interrupt = xtensa_cpu_exec_interrupt,
.cpu_exec_halt = xtensa_cpu_has_work,
.cpu_exec_reset = cpu_reset,
- .do_interrupt_locked = xtensa_cpu_do_interrupt,
+ .do_interrupt = xtensa_cpu_do_interrupt,
.do_transaction_failed = xtensa_cpu_do_transaction_failed,
.do_unaligned_access = xtensa_cpu_do_unaligned_access,
.debug_check_breakpoint = xtensa_debug_check_breakpoint,
diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c
index 7cb67d179a8..81b303a35f3 100644
--- a/target/xtensa/exc_helper.c
+++ b/target/xtensa/exc_helper.c
@@ -208,6 +208,8 @@ void xtensa_cpu_do_interrupt(CPUState *cs)
{
CPUXtensaState *env = cpu_env(cs);
+ BQL_LOCK_GUARD();
+
if (cs->exception_index == EXC_IRQ) {
uint64_t last_pc = env->pc;
--
2.53.0
next prev parent reply other threads:[~2026-09-02 15:23 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 15:20 [PATCH v3 00/11] accel/tcg: Push BQL down into per-target do_interrupt handlers Philippe Mathieu-Daudé
2026-09-02 15:20 ` [PATCH v3 03/11] target/i386: Rename fake_do_interrupt to fake_user_exception Philippe Mathieu-Daudé
2026-09-13 2:44 ` Richard Henderson
2026-09-02 15:20 ` [PATCH v3 04/11] accel/tcg: Document cpu_exec_interrupt() callback contract Philippe Mathieu-Daudé
2026-09-08 16:25 ` Peter Maydell
2026-09-02 15:20 ` [PATCH v3 08/11] target/hexagon: Move to do_interrupt() (BQL acquired internally) Philippe Mathieu-Daudé
2026-09-03 0:15 ` Brian Cain
2026-09-13 3:55 ` Richard Henderson
2026-09-02 15:20 ` [RFC PATCH v3 09/11] targets: Move interrupt handlers to do_interrupt() Philippe Mathieu-Daudé
2026-09-02 15:20 ` Philippe Mathieu-Daudé [this message]
2026-09-02 15:33 ` [PATCH v3 00/11] accel/tcg: Push BQL down into per-target do_interrupt handlers Philippe Mathieu-Daudé
[not found] ` <20260902152044.31291-2-philmd@oss.qualcomm.com>
2026-09-02 19:52 ` [PATCH v3 01/11] target/arm: Call arm*_cpu_do_interrupt directly instead of via TCGCPUOps Pierrick Bouvier
2026-09-08 16:09 ` Peter Maydell
2026-09-13 2:42 ` Richard Henderson
[not found] ` <20260902152044.31291-3-philmd@oss.qualcomm.com>
2026-09-02 19:52 ` [PATCH v3 02/11] target/s390x: Restrict interrupt handlers to system mode Pierrick Bouvier
2026-09-13 2:43 ` Richard Henderson
[not found] ` <20260902152044.31291-6-philmd@oss.qualcomm.com>
2026-09-02 19:54 ` [PATCH v3 05/11] accel/tcg: Document do_interrupt() callback contract Pierrick Bouvier
2026-09-02 20:48 ` Philippe Mathieu-Daudé
2026-09-13 3:30 ` Richard Henderson
[not found] ` <20260902152044.31291-8-philmd@oss.qualcomm.com>
2026-09-13 3:50 ` [PATCH v3 07/11] accel/tcg: Add do_interrupt() wrapper for targets to manage BQL Richard Henderson
[not found] ` <20260902152044.31291-12-philmd@oss.qualcomm.com>
2026-09-13 4:00 ` [PATCH v3 11/11] accel/tcg: Remove do_interrupt_locked() callback Richard Henderson
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