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envelope-from=bin.meng@processmission.com; helo=SEYPR02CU001.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Instantiate both E2000 MCI controllers at their low-peripheral addresses, route their interrupts to the GIC, and create an SD card on each exported bus. Map legacy IF_SD backends by controller index so firmware and Linux use the same board-visible media topology. Keep the broad unimplemented aperture underneath the concrete devices and make SD the machine's default block interface. Signed-off-by: Bin Meng --- Changes in v2: - Move MCI controllers into the SoC and attach cards in the machine include/hw/arm/phytium_e2000.h | 9 ++++++ hw/arm/phytium_e2000.c | 56 ++++++++++++++++++++++++++++++++++ hw/arm/phytium_e2000_machine.c | 19 ++++++++++++ hw/arm/Kconfig | 1 + 4 files changed, 85 insertions(+) diff --git a/include/hw/arm/phytium_e2000.h b/include/hw/arm/phytium_e2000.h index dcb6c46272..e759d71746 100644 --- a/include/hw/arm/phytium_e2000.h +++ b/include/hw/arm/phytium_e2000.h @@ -14,15 +14,20 @@ #include "hw/arm/boot.h" #include "hw/core/sysbus.h" +#include "hw/sd/phytium_e2000_mci.h" +#include "qemu/typedefs.h" #include "target/arm/cpu.h" #define TYPE_PHYTIUM_E2000_SOC "phytium-e2000-soc" OBJECT_DECLARE_SIMPLE_TYPE(PhytiumE2000SoCState, PHYTIUM_E2000_SOC) #define PHYTIUM_E2000_NUM_CPUS 4 +#define PHYTIUM_E2000_NUM_MCIS 2 enum { PHYTIUM_E2000_LOW_PERIPH, + PHYTIUM_E2000_MCI0, + PHYTIUM_E2000_MCI1, PHYTIUM_E2000_UART0, PHYTIUM_E2000_UART1, PHYTIUM_E2000_UART2, @@ -52,6 +57,7 @@ struct PhytiumE2000SoCState { SysBusDevice parent_obj; DeviceState *gic; + PhytiumE2000MciState *mci[PHYTIUM_E2000_NUM_MCIS]; ARMCPU cpu[PHYTIUM_E2000_NUM_CPUS]; unsigned int num_cpus; }; @@ -64,5 +70,8 @@ void phytium_e2000_soc_cpu_topology(unsigned int index, int64_t *core_id); ARMCPU *phytium_e2000_soc_cpu(PhytiumE2000SoCState *s, unsigned int index); +void phytium_e2000_soc_attach_sd_card(PhytiumE2000SoCState *s, + unsigned int index, + BlockBackend *blk); #endif diff --git a/hw/arm/phytium_e2000.c b/hw/arm/phytium_e2000.c index ccfd9bad7e..c618065ffe 100644 --- a/hw/arm/phytium_e2000.c +++ b/hw/arm/phytium_e2000.c @@ -24,6 +24,7 @@ #include "hw/misc/unimp.h" #include "hw/pci/pci.h" #include "hw/pci-host/gpex.h" +#include "hw/sd/sd.h" #include "qobject/qlist.h" #include "qom/object.h" #include "target/arm/cpu.h" @@ -45,6 +46,8 @@ */ const MemMapEntry phytium_e2000_memmap[] = { [PHYTIUM_E2000_LOW_PERIPH] = { 0x28000000, 0x00100000 }, + [PHYTIUM_E2000_MCI0] = { 0x28000000, 0x00001000 }, + [PHYTIUM_E2000_MCI1] = { 0x28001000, 0x00001000 }, [PHYTIUM_E2000_UART0] = { 0x2800c000, 0x00001000 }, [PHYTIUM_E2000_UART1] = { 0x2800d000, 0x00001000 }, [PHYTIUM_E2000_UART2] = { 0x2800e000, 0x00001000 }, @@ -68,6 +71,11 @@ const MemMapEntry phytium_e2000_memmap[] = { [PHYTIUM_E2000_RAM_HIGH] = { 0x2000000000ULL, 0x180000000ULL }, }; +static const int phytium_e2000_mci_irqmap[] = { + [0] = 72, + [1] = 73, +}; + static const int phytium_e2000_uart_irqmap[] = { [0] = 83, [1] = 84, @@ -374,6 +382,31 @@ static void phytium_e2000_create_pcie(PhytiumE2000SoCState *s) } } +static void phytium_e2000_create_mci(PhytiumE2000SoCState *s, int index) +{ + PhytiumE2000MciState *mci = + PHYTIUM_E2000_MCI(qdev_new(TYPE_PHYTIUM_E2000_MCI)); + DeviceState *dev = DEVICE(mci); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + MemoryRegion *iomem; + int map_idx = PHYTIUM_E2000_MCI0 + index; + g_autofree char *name = g_strdup_printf("mci%d", index); + + /* + * MCI0 and MCI1 occupy the first two pages of the broad low-peripheral + * placeholder. Use a higher overlap priority so real command and data + * accesses reach the controller model. + */ + s->mci[index] = mci; + object_property_add_child(OBJECT(s), name, OBJECT(mci)); + sysbus_realize_and_unref(sbd, &error_fatal); + iomem = sysbus_mmio_get_region(sbd, 0); + memory_region_add_subregion_overlap( + get_system_memory(), phytium_e2000_memmap[map_idx].base, iomem, 1); + sysbus_connect_irq(sbd, 0, + qdev_get_gpio_in(s->gic, phytium_e2000_mci_irqmap[index])); +} + static void phytium_e2000_create_unimplemented(PhytiumE2000SoCState *s) { /* @@ -461,6 +494,26 @@ ARMCPU *phytium_e2000_soc_cpu(PhytiumE2000SoCState *s, return &s->cpu[index]; } +void phytium_e2000_soc_attach_sd_card(PhytiumE2000SoCState *s, + unsigned int index, + BlockBackend *blk) +{ + BusState *bus; + DeviceState *card; + + g_assert(index < ARRAY_SIZE(s->mci)); + bus = BUS(dw_mci_get_bus(DW_MCI(s->mci[index]))); + + /* + * Always instantiate the socket-level card object. A missing backend then + * behaves as an empty slot, while if=sd,index=N gives firmware a real SD + * card on the matching physical MCI controller. + */ + card = qdev_new(TYPE_SD_CARD); + qdev_prop_set_drive_err(card, "drive", blk, &error_fatal); + qdev_realize_and_unref(card, bus, &error_fatal); +} + static void phytium_e2000_soc_realize(DeviceState *dev, Error **errp) { PhytiumE2000SoCState *s = PHYTIUM_E2000_SOC(dev); @@ -476,6 +529,9 @@ static void phytium_e2000_soc_realize(DeviceState *dev, Error **errp) phytium_e2000_create_cpus(s); phytium_e2000_create_gic(s); + for (i = 0; i < PHYTIUM_E2000_NUM_MCIS; i++) { + phytium_e2000_create_mci(s, i); + } for (i = 0; i < PHYTIUM_E2000_NUM_UARTS; i++) { phytium_e2000_create_uart(s, i); } diff --git a/hw/arm/phytium_e2000_machine.c b/hw/arm/phytium_e2000_machine.c index 8a4f8d4275..7397c58a78 100644 --- a/hw/arm/phytium_e2000_machine.c +++ b/hw/arm/phytium_e2000_machine.c @@ -14,6 +14,7 @@ #include "qemu/units.h" #include "qapi/error.h" #include "system/address-spaces.h" +#include "system/block-backend-global-state.h" #include "system/kvm.h" #include "exec/hwaddr.h" #include "hw/arm/boot.h" @@ -35,6 +36,23 @@ struct PhytiumPiMachineState { MemoryRegion ram_high; }; +static BlockBackend *phytium_e2000_sd_blk(int index) +{ + DriveInfo *dinfo = drive_get(IF_SD, 0, index); + + return dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; +} + +static void phytium_e2000_attach_sd_cards(PhytiumPiMachineState *s) +{ + int i; + + for (i = 0; i < PHYTIUM_E2000_NUM_MCIS; i++) { + phytium_e2000_soc_attach_sd_card( + &s->soc, i, phytium_e2000_sd_blk(i)); + } +} + static void phytium_e2000_create_ram(PhytiumPiMachineState *s) { MachineState *ms = MACHINE(s); @@ -95,6 +113,7 @@ static void phytium_pi_init(MachineState *ms) TYPE_PHYTIUM_E2000_SOC); phytium_e2000_soc_configure(&s->soc, ms->smp.cpus); sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal); + phytium_e2000_attach_sd_cards(s); s->bootinfo.ram_size = ms->ram_size; s->bootinfo.board_id = -1; diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 84d0cefd81..8b865e4e30 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -136,6 +136,7 @@ config PHYTIUM_E2000 select PCI_EXPRESS select PCI_EXPRESS_GENERIC_BRIDGE select PL011 + select SD select UNIMP config REALVIEW -- 2.53.0