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[209.51.188.17]) by mx.google.com with ESMTPS id l17si129335ios.104.2021.03.04.11.34.55 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 04 Mar 2021 11:34:55 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nZF85RrB; spf=pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:35888 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lHtkN-0006a7-5p for alex.bennee@linaro.org; Thu, 04 Mar 2021 14:34:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:47192) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHtkB-0006ZJ-Sn for qemu-arm@nongnu.org; Thu, 04 Mar 2021 14:34:43 -0500 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]:42792) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lHtk9-0004V5-5P for qemu-arm@nongnu.org; Thu, 04 Mar 2021 14:34:43 -0500 Received: by mail-pf1-x432.google.com with SMTP id w18so19677885pfu.9 for ; Thu, 04 Mar 2021 11:34:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=subject:to:references:from:message-id:date:user-agent:mime-version :in-reply-to:content-language:content-transfer-encoding; bh=mhiIeoDCIjNu5cHdu32vkf1b234ZOSh9+pH/oK5fT0Y=; b=nZF85RrBSQgm20Mn5rr3Q4YKtNoIlNZdeyBUG5CZREjqbi5RasTjNazV5mX5ZZA3Uj mbIq6gT23FsP64aW0fEXYiCHSS2LWwcFq2ObxxnTX5Mw217QwT3lU2f1PXqDlBq9v8Bs 4lea7AdZGs35qng+wqthJM51S+DZxEtyOxpEXXEJwMII5cxN7SM6Gu4RGhzgEW/ACjE/ j6v0ELZmKZU1cQZehy8Y4NW8ZCto7rr2qhHxqvUwEBbnO1scnTh6F6ppgrXH1nzIQs5o tZoKn60+m7/UBKdzqT27MAEDVJU3aRor8VnjjKe4xuSnDnN/qhfE/ai7Y1SoQaml2zgR LUww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=mhiIeoDCIjNu5cHdu32vkf1b234ZOSh9+pH/oK5fT0Y=; b=YUDAX4PYHvBSkZkNZpgQK6GGx6ONFt6VT2rC/hHYHBdznktJgfFrW6oD9truFyGEO4 c180KkEBCOCYmgz6ixkKTHOlCZLFR1k1emsho3deRlzUllaXgvG8yGIXYfH7lPr5vabY D/dmj0P6swpjUizMbnQTBtHtyzVvaYXBz/AcZSt07KseWjBsr4nisD/BFMx2T9NV/ch5 elqY39KW18032r+3tyxJoqli111gCaAqSEvfeEbwrBMytGiV7tZiydbc/7IPH+POy4XJ 4e8NsRV0rNQ7a01//bI+r/fQwA2YDcPZnHD8peuNmtuhzIts3hf/rpl0/EAqHnOqAVwC IaLw== X-Gm-Message-State: AOAM531VkDTE9Y+GRvOZPJL3Cw/TXwvfFHj9EtMx6vND6RhgURg9U7nI Rc4A24Xy04L/PKDilPwhjC1+vA== X-Received: by 2002:a65:5ac9:: with SMTP id d9mr4903533pgt.74.1614886479548; Thu, 04 Mar 2021 11:34:39 -0800 (PST) Received: from [192.168.1.11] ([71.212.131.83]) by smtp.gmail.com with ESMTPSA id k128sm178414pfd.137.2021.03.04.11.34.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 Mar 2021 11:34:39 -0800 (PST) Subject: Re: [PATCH 14/44] hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300 To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20210219144617.4782-1-peter.maydell@linaro.org> <20210219144617.4782-15-peter.maydell@linaro.org> From: Richard Henderson Message-ID: <32cefbd3-6af0-da4b-b07d-9d8fe52e46ee@linaro.org> Date: Thu, 4 Mar 2021 11:34:37 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210219144617.4782-15-peter.maydell@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: sSlgTWgYDN6d On 2/19/21 6:45 AM, Peter Maydell wrote: > In the SSE-300 the CPU_WAIT and NMI_ENABLE registers have > moved offsets, so they are now where the SSE-200's WICCTRL > and EWCTRL were. The SSE-300 does not have WICCTLR or EWCTRL > at all, and the old offsets are reserved: > > Offset SSE-200 SSE-300 > ----------------------------------- > 0x118 CPUWAIT reserved > 0x118 NMI_ENABLE reserved 0x11c > 0x120 WICCTRL CPUWAIT > 0x124 EWCTRL NMI_ENABLE > > Handle this reshuffle, and the fact that SSE-300 has only > one CPU and so only one active bit in CPUWAIT. > > Signed-off-by: Peter Maydell > --- What an irritating and pointless change. Reviewed-by: Richard Henderson r~