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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id g76sm30814140pfj.102.2018.05.03.10.39.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 May 2018 10:39:19 -0700 (PDT) To: Peter Maydell References: <20180427002651.28356-1-richard.henderson@linaro.org> <20180427002651.28356-5-richard.henderson@linaro.org> <1ad8ffc6-5549-99bf-940f-6734c579e354@linaro.org> From: Richard Henderson Openpgp: preference=signencrypt Message-ID: <41757507-1fff-e28e-9847-5e1a28d3b7ca@linaro.org> Date: Thu, 3 May 2018 10:39:17 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::236 Subject: Re: [Qemu-arm] [PATCH 4/9] tcg: Introduce atomic helpers for integer min/max X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm , QEMU Developers Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: 3K0TXyE0MOQq On 05/03/2018 10:26 AM, Peter Maydell wrote: >> It won't be compiled for the 32-bit host. Translation will not attempt to use >> this helper and will instead call exit_atomic. > > OK. Can you point me at the code that handles min/max atomics in that case? exit_atomic raises EXP_ATOMIC, which leads to cpu_exec_step_atomic, which grabs the exclusive lock and then executes the operation in a serial context. This is expanded inline via do_nonatomic_op_i64. r~