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[24.45.245.130]) by smtp.gmail.com with ESMTPSA id 45sm26087391qgg.17.2015.12.27.12.56.13 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 27 Dec 2015 12:56:13 -0800 (PST) To: Peter Maydell References: <1449101933-24928-1-git-send-email-mdavidsaver@gmail.com> <1449101933-24928-6-git-send-email-mdavidsaver@gmail.com> From: Michael Davidsaver Message-ID: <5680506D.9050402@gmail.com> Date: Sun, 27 Dec 2015 15:56:13 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400d:c09::234 Cc: Peter Crosthwaite , qemu-arm , QEMU Developers Subject: Re: [Qemu-arm] [PATCH v2 05/26] armv7m: add armv7m_excp_running_prio() X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: or/UR+Ynaq/S On 12/17/2015 09:36 AM, Peter Maydell wrote: > On 3 December 2015 at 00:18, Michael Davidsaver wrote: >> Implements v7m exception priority algorithm >> using FAULTMASK, PRIMASK, BASEPRI, and the highest >> priority active exception. >> >> The number returned is the current execution priority >> which may be in the range [-2,0x7f] when an exception is active >> or 0x100 when no exception is active. >> --- >> hw/intc/armv7m_nvic.c | 25 +++++++++++++++++++++++++ >> target-arm/cpu.h | 1 + >> 2 files changed, 26 insertions(+) >> >> diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c >> index 6fc167e..0145ca7 100644 >> --- a/hw/intc/armv7m_nvic.c >> +++ b/hw/intc/armv7m_nvic.c >> @@ -18,6 +18,8 @@ >> >> typedef struct { >> GICState gic; >> + uint8_t prigroup; >> + >> struct { >> uint32_t control; >> uint32_t reload; >> @@ -116,6 +118,29 @@ static void systick_reset(nvic_state *s) >> timer_del(s->systick.timer); >> } >> >> +/* @returns the active (running) exception priority. >> + * only a higher (numerically lower) priority can preempt. >> + */ >> +int armv7m_excp_running_prio(ARMCPU *cpu) >> +{ >> + CPUARMState *env = &cpu->env; >> + nvic_state *s = env->nvic; >> + int running; >> + >> + if (env->daif & PSTATE_F) { /* FAULTMASK */ >> + running = -1; >> + } else if (env->daif & PSTATE_I) { /* PRIMASK */ >> + running = 0; >> + } else if (env->v7m.basepri > 0) { >> + /* BASEPRI==1 -> masks [1,255] (not same as PRIMASK==1) */ >> + running = env->v7m.basepri >> (s->prigroup+1); > This isn't right -- the effect of PRIGROUP is that we mask > out the lower (subgroup) bits, but the upper group bits stay > where they are rather than shifting down. > > So you want env->v7m.basepri & ~((1 << (s->prigroup + 1)) - 1); > > (the same mask you need to get the group priority for > an interrupt). I don't know about "right", but it is consistent with how the .prio_group field is now handled in the nvic. So I think the final behavior is as specified. There is no functional reason that I do this. I just think it makes the DPRINTF messages easier to interpret. If you feel strongly I can change this.