From: Eric Auger <eric.auger@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: eric.auger@st.com, pranav.sawargaonkar@gmail.com,
Pavel Fedin <p.fedin@samsung.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Alexander Graf <agraf@suse.de>,
Bharat Bhushan <Bharat.Bhushan@freescale.com>,
Alex Williamson <alex.williamson@redhat.com>,
qemu-arm <qemu-arm@nongnu.org>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Christoffer Dall <christoffer.dall@linaro.org>
Subject: Re: [Qemu-arm] [RFC 6/7] hw: arm: virt: register reserved IOVA region
Date: Thu, 28 Jan 2016 11:20:27 +0100 [thread overview]
Message-ID: <56A9EB6B.4020905@linaro.org> (raw)
In-Reply-To: <CAFEAcA9_wR=0+Mbq-7CiQAUSphRrLB70c4MeoDawpMUzbPHLQg@mail.gmail.com>
On 01/28/2016 11:10 AM, Peter Maydell wrote:
> On 27 January 2016 at 13:51, Eric Auger <eric.auger@linaro.org> wrote:
>> Registers a 16x64kB reserved iova region. Currently this iova
>> region is used by the kernel to map host MSI controller frames
>> (GICv2m, GITS_TRANSLATER).
>
> Do you mean the host kernel or the guest kernel? The host
> kernel should be keeping its paws out of the guest's
> address space, and the guest kernel can manage the memory
> and the address space any way it likes, I would have thought.
> It's not clear to me what this is for.
I meant the host kernel.
If we do not do anything, the host VFIO-PCI driver programs the PCI
device with host GICv2m MSI frame host physical address (as an example).
Since it goes through the sMMU and there is no mapping defined, this
faults. So the idea of this series is that the guest provides some
unused guest PA = IOVA. This window can be used by the host VFIO-PCI
driver to transparently create an IOVA/ host GICv2 MSI frame mapping.
That way the PCI device is programmed with this IOVA and this eventually
reaches the host GICv2m MSI frame physical page.
Hope it clarifies.
>
>> Signed-off-by: Eric Auger <eric.auger@linaro.org>
>> ---
>> hw/arm/virt.c | 10 ++++++++++
>> include/hw/arm/virt.h | 1 +
>> 2 files changed, 11 insertions(+)
>>
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 3839c68..7eaf8be 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -125,6 +125,7 @@ static const MemMapEntry a15memmap[] = {
>> [VIRT_GPIO] = { 0x09030000, 0x00001000 },
>> [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 },
>> [VIRT_MMIO] = { 0x0a000000, 0x00000200 },
>> + [VIRT_RESERVED] = { 0x0be00000, 0x00100000 },
>> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
>
> You've put the new entry between the VIRT_MMIO line and the comment that
> is associated with it.
sure thanks
Eric
>
> thanks
> -- PMM
>
next prev parent reply other threads:[~2016-01-28 10:20 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-27 13:51 [Qemu-arm] [RFC 0/7] KVM PCI/MSI passthrough with mach-virt Eric Auger
2016-01-27 13:51 ` [Qemu-devel] [RFC 1/7] linux-headers: partial update for VFIO reserved IOVA registration Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 2/7] Add a function to determine interrupt number for INTx routing Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 3/7] Generic PCIe host bridge INTx determination " Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 4/7] hw: vfio: common: introduce vfio_register_reserved_iova Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 5/7] memory: add reserved_iova region type Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 6/7] hw: arm: virt: register reserved IOVA region Eric Auger
2016-01-28 7:10 ` Pavel Fedin
2016-01-28 9:39 ` Eric Auger
2016-01-28 10:10 ` Peter Maydell
2016-01-28 10:20 ` Eric Auger [this message]
2016-01-27 13:51 ` [Qemu-arm] [RFC 7/7] hw: vfio: common: adapt vfio_listeners for reserved_iova region Eric Auger
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