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[80.11.198.90]) by smtp.googlemail.com with ESMTPSA id qs1sm10296337wjc.2.2016.01.28.02.20.43 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 28 Jan 2016 02:20:45 -0800 (PST) To: Peter Maydell References: <1453902715-25304-1-git-send-email-eric.auger@linaro.org> <1453902715-25304-7-git-send-email-eric.auger@linaro.org> From: Eric Auger Message-ID: <56A9EB6B.4020905@linaro.org> Date: Thu, 28 Jan 2016 11:20:27 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::22d Cc: eric.auger@st.com, pranav.sawargaonkar@gmail.com, Pavel Fedin , QEMU Developers , Alexander Graf , Bharat Bhushan , Alex Williamson , qemu-arm , Suravee Suthikulpanit , Paolo Bonzini , Christoffer Dall Subject: Re: [Qemu-arm] [RFC 6/7] hw: arm: virt: register reserved IOVA region X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: 4rbVjXQQpPvD On 01/28/2016 11:10 AM, Peter Maydell wrote: > On 27 January 2016 at 13:51, Eric Auger wrote: >> Registers a 16x64kB reserved iova region. Currently this iova >> region is used by the kernel to map host MSI controller frames >> (GICv2m, GITS_TRANSLATER). > > Do you mean the host kernel or the guest kernel? The host > kernel should be keeping its paws out of the guest's > address space, and the guest kernel can manage the memory > and the address space any way it likes, I would have thought. > It's not clear to me what this is for. I meant the host kernel. If we do not do anything, the host VFIO-PCI driver programs the PCI device with host GICv2m MSI frame host physical address (as an example). Since it goes through the sMMU and there is no mapping defined, this faults. So the idea of this series is that the guest provides some unused guest PA = IOVA. This window can be used by the host VFIO-PCI driver to transparently create an IOVA/ host GICv2 MSI frame mapping. That way the PCI device is programmed with this IOVA and this eventually reaches the host GICv2m MSI frame physical page. Hope it clarifies. > >> Signed-off-by: Eric Auger >> --- >> hw/arm/virt.c | 10 ++++++++++ >> include/hw/arm/virt.h | 1 + >> 2 files changed, 11 insertions(+) >> >> diff --git a/hw/arm/virt.c b/hw/arm/virt.c >> index 3839c68..7eaf8be 100644 >> --- a/hw/arm/virt.c >> +++ b/hw/arm/virt.c >> @@ -125,6 +125,7 @@ static const MemMapEntry a15memmap[] = { >> [VIRT_GPIO] = { 0x09030000, 0x00001000 }, >> [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 }, >> [VIRT_MMIO] = { 0x0a000000, 0x00000200 }, >> + [VIRT_RESERVED] = { 0x0be00000, 0x00100000 }, >> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */ > > You've put the new entry between the VIRT_MMIO line and the comment that > is associated with it. sure thanks Eric > > thanks > -- PMM >