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From: Sergey Fedorov <serge.fdrv@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	qemu-arm@nongnu.org,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()
Date: Fri, 29 Jan 2016 19:50:36 +0300	[thread overview]
Message-ID: <56AB985C.2080605@gmail.com> (raw)
In-Reply-To: <56AB972A.5010007@gmail.com>

On 29.01.2016 19:45, Sergey Fedorov wrote:
> On 14.01.2016 21:34, Peter Maydell wrote:
>> > Support EL2 and EL3 in arm_el_is_aa64() by implementing the
>> > logic for checking the SCR_EL3 and HCR_EL2 register-width bits
>> > as appropriate to determine the register width of lower exception
>> > levels.
> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>

Oops... I should put this below the following "Signed-off-by" statement :)

>
>> >
>> > Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

  reply	other threads:[~2016-01-29 16:50 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-14 18:34 [PATCH 0/8] target-arm: support mixed 32/64 bit execution beyond EL0 Peter Maydell
2016-01-14 18:34 ` [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64() Peter Maydell
2016-01-15 14:38   ` Edgar E. Iglesias
2016-01-15 14:50     ` Peter Maydell
2016-01-15 15:37       ` Edgar E. Iglesias
2016-01-15 15:47         ` Peter Maydell
2016-01-15 20:37           ` Edgar E. Iglesias
2016-01-29 16:45   ` [Qemu-devel] " Sergey Fedorov
2016-01-29 16:50     ` Sergey Fedorov [this message]
2016-01-29 17:05     ` Peter Maydell
2016-01-29 17:08       ` Sergey Fedorov
2016-01-14 18:34 ` [PATCH 2/8] target-arm: Move aarch64_cpu_do_interrupt() to helper.c Peter Maydell
2016-01-15 14:39   ` Edgar E. Iglesias
2016-01-29 16:46   ` [Qemu-devel] " Sergey Fedorov
2016-01-14 18:34 ` [PATCH 3/8] target-arm: Use a single entry point for AArch64 and AArch32 exceptions Peter Maydell
2016-01-15 14:54   ` Edgar E. Iglesias
2016-01-29 16:46   ` [Qemu-arm] " Sergey Fedorov
2016-01-14 18:34 ` [PATCH 4/8] target-arm: Pull semihosting handling out to arm_cpu_do_interrupt() Peter Maydell
2016-01-29 16:46   ` [Qemu-devel] " Sergey Fedorov
2016-01-14 18:34 ` [PATCH 5/8] target-arm: Fix wrong AArch64 entry offset for EL2/EL3 target Peter Maydell
2016-01-19 16:40   ` Edgar E. Iglesias
2016-01-29 16:47   ` [Qemu-devel] " Sergey Fedorov
2016-01-14 18:34 ` [PATCH 6/8] target-arm: Handle exception return from AArch64 to non-EL0 AArch32 Peter Maydell
2016-01-19 16:47   ` Edgar E. Iglesias
2016-01-29 16:47   ` [Qemu-arm] " Sergey Fedorov
2016-01-14 18:34 ` [PATCH 7/8] target-arm: Implement remaining illegal return event checks Peter Maydell
2016-01-19 16:53   ` Edgar E. Iglesias
2016-01-19 16:58     ` Peter Maydell
2016-01-29 16:47   ` [Qemu-devel] " Sergey Fedorov
2016-01-14 18:34 ` [PATCH 8/8] target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM mode Peter Maydell
2016-01-19 16:56   ` Edgar E. Iglesias
2016-01-29 16:48   ` [Qemu-devel] [Qemu-arm] " Sergey Fedorov

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