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Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <1454690704-16233-2-git-send-email-peter.maydell@linaro.org> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:4010:c04::242 Cc: qemu-arm@nongnu.org, patches@linaro.org Subject: Re: [Qemu-arm] [Qemu-devel] [PATCH 1/6] target-arm: correct CNTFRQ access rights X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: XX+Q/aIcgVpg On 05.02.2016 19:44, Peter Maydell wrote: > Correct some corner cases we were getting wrong for > CNTFRQ access rights: > * should UNDEF from 32-bit Secure EL1 > * only writable from the highest implemented exception level, > which might not be EL1 now > > Signed-off-by: Peter Maydell > --- > target-arm/helper.c | 31 ++++++++++++++++++++++++++++--- > 1 file changed, 28 insertions(+), 3 deletions(-) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 7a8881a..082701a 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -1217,9 +1217,34 @@ static const ARMCPRegInfo v6k_cp_reginfo[] = { > static CPAccessResult gt_cntfrq_access(CPUARMState *env, const ARMCPRegInfo *ri, > bool isread) > { > - /* CNTFRQ: not visible from PL0 if both PL0PCTEN and PL0VCTEN are zero */ > - if (arm_current_el(env) == 0 && !extract32(env->cp15.c14_cntkctl, 0, 2)) { > - return CP_ACCESS_TRAP; > + /* CNTFRQ: not visible from PL0 if both PL0PCTEN and PL0VCTEN are zero. > + * Writable only at the highest implemented exception level. > + */ > + switch (arm_current_el(env)) { > + case 0: > + if (!extract32(env->cp15.c14_cntkctl, 0, 2)) { > + return CP_ACCESS_TRAP; > + } > + /* EL0 reads are forbidden by the .access fields */ s/reads/writes/ ? > + break; > + case 1: > + if (!isread && (arm_feature(env, ARM_FEATURE_EL2) > + || arm_feature(env, ARM_FEATURE_EL3))) { > + return CP_ACCESS_TRAP_UNCATEGORIZED; > + } > + if (!isread && ri->state == ARM_CP_STATE_AA32 && > + arm_is_secure_below_el3(env)) { > + /* Accesses from 32-bit Secure EL1 UNDEF (*not* trap to EL3!) */ > + return CP_ACCESS_TRAP_UNCATEGORIZED; > + } > + break; > + case 2: > + if (!isread && arm_feature(env, ARM_FEATURE_EL3)) { > + return CP_ACCESS_TRAP_UNCATEGORIZED; > + } > + break; > + case 3: > + break; > } > return CP_ACCESS_OK; > } Maybe calculating "the highest implemented exception level" could simplify reading of the code a bit? E.g.: int highest_el = arm_feature(env, ARM_FEATURE_EL3) ? 3 : arm_feature(env, ARM_FEATURE_EL2) ? 2 : 1; We would probably want to have a dedicated static inline function for this similar to HighestEL() from ARMv8 ARM pseudocode. Kind regards, Sergey