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From: Sergey Fedorov <serge.fdrv@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, patches@linaro.org
Subject: Re: [Qemu-arm] [PATCH 05/11] target-arm: In cpsr_write() ignore mode switches from User mode
Date: Thu, 18 Feb 2016 20:43:02 +0300	[thread overview]
Message-ID: <56C602A6.6070009@gmail.com> (raw)
In-Reply-To: <1455556977-3644-6-git-send-email-peter.maydell@linaro.org>

On 15.02.2016 20:22, Peter Maydell wrote:
> The only case where we can attempt a cpsr_write() mode switch from
> User is from the gdbstub; all other cases are handled in the
> calling code (notably translate.c). Architecturally attempts to
> alter the mode bits from user mode are simply ignored (and not
> treated as a bad mode switch, which in v8 sets CPSR.IL). Make
> mode switches from User ignored in cpsr_write() as well, for
> consistency.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>

> ---
>  target-arm/helper.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index d1919bb..9998a25 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -5282,6 +5282,7 @@ void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask,
>      env->daif |= val & CPSR_AIF & mask;
>  
>      if (write_type != CPSRWriteRaw &&
> +        (env->uncached_cpsr & CPSR_M) != CPSR_USER &&
>          ((env->uncached_cpsr ^ val) & mask & CPSR_M)) {
>          if (bad_mode_switch(env, val & CPSR_M)) {
>              /* Attempt to switch to an invalid mode: this is UNPREDICTABLE.


  reply	other threads:[~2016-02-18 17:44 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-15 17:22 [Qemu-devel] [PATCH 00/11] target-arm: clean up cpsr_write mode changing Peter Maydell
2016-02-15 17:22 ` [Qemu-arm] [PATCH 01/11] target-arm: Give CPSR setting on 32-bit exception return its own helper Peter Maydell
2016-02-18 17:41   ` Sergey Fedorov
2016-02-15 17:22 ` [Qemu-arm] [PATCH 02/11] target-arm: Add write_type argument to cpsr_write() Peter Maydell
2016-02-18 17:42   ` Sergey Fedorov
2016-02-15 17:22 ` [Qemu-devel] [PATCH 03/11] target-arm: Raw CPSR writes should skip checks and bank switching Peter Maydell
2016-02-18 17:42   ` [Qemu-arm] " Sergey Fedorov
2016-02-15 17:22 ` [Qemu-arm] [PATCH 04/11] linux-user: Use restrictive mask when calling cpsr_write() Peter Maydell
2016-02-18 17:42   ` [Qemu-devel] " Sergey Fedorov
2016-02-15 17:22 ` [Qemu-arm] [PATCH 05/11] target-arm: In cpsr_write() ignore mode switches from User mode Peter Maydell
2016-02-18 17:43   ` Sergey Fedorov [this message]
2016-02-15 17:22 ` [Qemu-devel] [PATCH 06/11] target-arm: Add comment about not implementing NSACR.RFR Peter Maydell
2016-02-18 17:43   ` Sergey Fedorov
2016-02-15 17:22 ` [Qemu-devel] [PATCH 07/11] target-arm: Add Hyp mode checks to bad_mode_switch() Peter Maydell
2016-02-18 17:43   ` [Qemu-arm] " Sergey Fedorov
2016-02-15 17:22 ` [Qemu-devel] [PATCH 08/11] target-arm: Forbid mode switch to Mon from Secure EL1 Peter Maydell
2016-02-18 17:43   ` [Qemu-arm] " Sergey Fedorov
2016-02-15 17:22 ` [Qemu-devel] [PATCH 09/11] target-arm: In v8, make illegal AArch32 mode changes set PSTATE.IL Peter Maydell
2016-02-18 17:44   ` [Qemu-arm] " Sergey Fedorov
2016-02-15 17:22 ` [Qemu-devel] [PATCH 10/11] target-arm: Make mode switches from Hyp via CPS and MRS illegal Peter Maydell
2016-02-18 17:44   ` [Qemu-arm] " Sergey Fedorov
2016-02-15 17:22 ` [Qemu-devel] [PATCH 11/11] target-arm: Make Monitor->NS PL1 mode changes illegal if HCR.TGE is 1 Peter Maydell
2016-02-18 17:44   ` [Qemu-arm] " Sergey Fedorov

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