From: Eric Auger <eric.auger@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: eric.auger@st.com,
Pranav Sawargaonkar <pranav.sawargaonkar@gmail.com>,
Pavel Fedin <p.fedin@samsung.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Alexander Graf <agraf@suse.de>,
Bharat Bhushan <Bharat.Bhushan@freescale.com>,
Alex Williamson <alex.williamson@redhat.com>,
qemu-arm <qemu-arm@nongnu.org>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Christoffer Dall <christoffer.dall@linaro.org>
Subject: Re: [Qemu-arm] [RFC v2 3/8] Generic PCIe host bridge INTx determination for INTx routing
Date: Thu, 18 Feb 2016 19:15:37 +0100 [thread overview]
Message-ID: <56C60A49.3000800@linaro.org> (raw)
In-Reply-To: <CAFEAcA_ZQu7Lecf4UTG+br9yfVr64m_51CtHqGry0K-DnQO+ZA@mail.gmail.com>
Hi Peter,
On 02/16/2016 07:14 PM, Peter Maydell wrote:
> On 29 January 2016 at 16:53, Eric Auger <eric.auger@linaro.org> wrote:
>> This patch stores information about assigned legacy interrupt numbers in
>> GPEX host structure.
>> This is used during GPEX INTx number determination from a pin during
>> INTx routing.
>>
>> Signed-off-by: Pranavkumar Sawargaonkar <address@hidden>
>> Signed-off-by: Tushar Jagad <address@hidden>
>> ---
>> hw/arm/virt.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 15658f4..3839c68 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -826,6 +826,7 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic,
>> char *nodename;
>> int i;
>> PCIHostState *pci;
>> + GPEXHost *s;
>>
>> dev = qdev_create(NULL, TYPE_GPEX_HOST);
>> qdev_init_nofail(dev);
>> @@ -861,8 +862,11 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic,
>> /* Map IO port space */
>> sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, base_pio);
>>
>> + s = GPEX_HOST(dev);
>> +
>> for (i = 0; i < GPEX_NUM_IRQS; i++) {
>> sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, pic[irq + i]);
>> + s->irq_num[i] = irq + i;
>> }
>
> I don't think that the board code should be prodding stuff in the GPEXHost
> struct like this -- device structs are supposed to be private to the
> device implementation. If you need the information in the device then
> you need to come up with a better API for this.
Sure, Thanks
Eric
>
> thanks
> -- PMM
>
next prev parent reply other threads:[~2016-02-18 18:16 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-29 16:53 [Qemu-arm] [RFC v2 0/8] KVM PCI/MSI passthrough with mach-virt Eric Auger
2016-01-29 16:53 ` [Qemu-arm] [RFC v2 1/8] linux-headers: partial update for VFIO reserved IOVA registration Eric Auger
2016-01-29 16:53 ` [Qemu-devel] [RFC v2 2/8] Add a function to determine interrupt number for INTx routing Eric Auger
2016-01-29 16:53 ` [Qemu-arm] [RFC v2 3/8] Generic PCIe host bridge INTx determination " Eric Auger
2016-02-16 18:14 ` Peter Maydell
2016-02-18 18:15 ` Eric Auger [this message]
2016-01-29 16:53 ` [Qemu-devel] [RFC v2 4/8] hw: vfio: common: introduce vfio_register_reserved_iova Eric Auger
2016-01-29 16:53 ` [Qemu-arm] [RFC v2 5/8] memory: add reserved_iova region type Eric Auger
2016-01-29 16:53 ` [Qemu-arm] [RFC v2 6/8] hw: platform-bus: enable to map any memory region onto the platform-bus Eric Auger
2016-02-16 18:16 ` Peter Maydell
2016-01-29 16:53 ` [Qemu-devel] [RFC v2 7/8] hw: arm: virt: register reserved IOVA region Eric Auger
2016-02-16 18:21 ` [Qemu-arm] " Peter Maydell
2016-02-18 18:48 ` Eric Auger
2016-01-29 16:53 ` [Qemu-arm] [RFC v2 8/8] hw: vfio: common: adapt vfio_listeners for reserved_iova region Eric Auger
2016-02-16 18:23 ` [Qemu-arm] [RFC v2 0/8] KVM PCI/MSI passthrough with mach-virt Peter Maydell
2016-05-04 11:18 ` [Qemu-devel] " Yehuda Yitschak
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