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From: Alexander Graf <agraf@suse.de>
To: Mihai Claudiu Caraman <mike.caraman@nxp.com>,
	Peter Maydell <peter.maydell@linaro.org>
Cc: Eric Auger <eric.auger@linaro.org>,
	Bogdan Purcareata <bogdan.purcareata@nxp.com>,
	qemu-arm <qemu-arm@nongnu.org>,
	QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-arm] [Qemu-devel] [PATCH 2/2] arm/virt: Mark pcie controller node as dma-coherent
Date: Fri, 3 Jun 2016 17:25:52 +0200	[thread overview]
Message-ID: <5751A180.8040407@suse.de> (raw)
In-Reply-To: <AM2PR04MB07394390024600CB1DD9918084590@AM2PR04MB0739.eurprd04.prod.outlook.com>

On 06/03/2016 05:16 PM, Mihai Claudiu Caraman wrote:
>> -----Original Message-----
>> From: Peter Maydell [mailto:peter.maydell@linaro.org]
>> Sent: Friday, June 03, 2016 5:38 PM
>> To: Mihai Claudiu Caraman <mike.caraman@nxp.com>
>> Cc: Bogdan Purcareata <bogdan.purcareata@nxp.com>; QEMU Developers <qemu-devel@nongnu.org>; Peter Crosthwaite <crosthwaite.peter@gmail.com>; Alexander Graf <agraf@suse.de>; qemu-arm <qemu-arm@nongnu.org>; Eric Auger <eric.auger@linaro.org>
>> Subject: Re: [Qemu-devel] [PATCH 2/2] arm/virt: Mark pcie controller node as dma-coherent
>>
>> On 3 June 2016 at 15:22, Mihai Claudiu Caraman <mike.caraman@nxp.com> wrote:
>>> In particular for virtual and emulated devices the host CPU behaves as
>>> a DMA coherent 'device'. This should have been stated in patch
>>> description.
>> Wouldn't that imply that we should just always have the "dma-coherent"
>> property set, and we don't need to do any of the messing around looking at the host sysfs ?
>>
>> thanks
>> -- PMM
> We can always set "dma-coherent" for virtual and emulated devices but not for passthrough devices. So we can't have one PCIe controller for all devices marked as "dma-coherent".

The original patch is about the case where PCI is already cache coherent 
on the host.

I think at the end of the day this is simply outside of QEMU's scope to 
decide. What we can do is set dma-coherent per default (if Will and Ard 
agree) on the default PCIe bus and add code that allows to spawn a 
secondary PCIe bus which can then have different dma-coherent attributes 
and that you can then plug your non-coherent vfio devices into.


Alex


  reply	other threads:[~2016-06-03 15:26 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-02 12:26 [Qemu-devel] [PATCH 0/2] arm/virt: Propagate pcie DMA coherency Bogdan Purcareata
2016-06-02 12:26 ` [Qemu-arm] [PATCH 1/2] device_tree: introduce qemu_fdt_node_path_prop Bogdan Purcareata
2016-06-02 12:26 ` [Qemu-arm] [PATCH 2/2] arm/virt: Mark pcie controller node as dma-coherent Bogdan Purcareata
2016-06-02 12:32   ` [Qemu-devel] " Peter Maydell
2016-06-02 12:45     ` Alexander Graf
2016-06-07  7:58       ` [Qemu-arm] " Auger Eric
2016-06-16 13:58       ` [Qemu-devel] " Ard Biesheuvel
2016-06-28 14:16         ` [Qemu-arm] " Peter Maydell
2016-06-29  7:52           ` Bogdan Purcareata
2016-06-03 14:22     ` [Qemu-arm] [Qemu-devel] " Mihai Claudiu Caraman
2016-06-03 14:37       ` Peter Maydell
2016-06-03 15:02         ` agraf
2016-06-03 15:16         ` Mihai Claudiu Caraman
2016-06-03 15:25           ` Alexander Graf [this message]
2016-06-03 16:44             ` Mihai Claudiu Caraman

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