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([2602:47:d49d:ec01:3b6c:3864:9643:140a]) by smtp.gmail.com with ESMTPSA id s23-20020a17090a1c1700b001fabcd994c1sm4855679pjs.9.2022.10.07.10.35.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 07 Oct 2022 10:35:05 -0700 (PDT) Message-ID: <630e438d-1ef5-dc22-c9ad-4576de22b24f@linaro.org> Date: Fri, 7 Oct 2022 10:35:03 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH v3 41/42] target/arm: Implement FEAT_HAFDBS Content-Language: en-US To: Peter Maydell Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org References: <20221001162318.153420-1-richard.henderson@linaro.org> <20221001162318.153420-42-richard.henderson@linaro.org> <52ec3b12-b9bb-b2a9-52c8-54a7016182c6@linaro.org> From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::131; envelope-from=richard.henderson@linaro.org; helo=mail-il1-x131.google.com X-Spam_score_int: -47 X-Spam_score: -4.8 X-Spam_bar: ---- X-Spam_report: (-4.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-2.699, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: M846Hf50yWQQ On 10/7/22 09:50, Peter Maydell wrote: > On Fri, 7 Oct 2022 at 17:45, Richard Henderson > wrote: >> >> On 10/7/22 06:47, Peter Maydell wrote: >>> Are there definitely no code paths where we might try to do >>> a page table walk with the iothread already locked ? >> >> I'll double-check, but another possibility is to simply perform the atomic operation on >> the low 32-bits, where both AF and DB are located. Another trick I learned from x86... > > Doesn't that cause a problem where we don't detect that some other > CPU wrote to the high 32 bits of the descriptor ? We're supposed to > be using those high 32 bits, not the ones we have in hand... Hmm, yes. Which now makes me wonder if the x86 case is in fact buggy... > If we do need the iothread lock, we could do it the way that > io_readx() does, I guess, where we track whether we needed to > lock it or not. yes. r~