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X-Received-From: 2a00:1450:400c:c09::236 Subject: Re: [Qemu-arm] [PATCH v2 1/6] aspeed: add support for the witherspoon-bmc board X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , qemu-arm , QEMU Developers , Joel Stanley Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: 33L8hztkpn2h On 10 October 2017 at 14:21, C=C3=A9dric Le Goater wrote: > On 10/10/2017 11:54 AM, Peter Maydell wrote: >> The goal is to model hardware correctly. Hardware gives >> aborts if you touch a physical address with no device there, >> and so QEMU's model should do the same. If you have guest >> code that touches a physical address and blows up because >> of an abort (but doesn't when run on h/w) then either: >> * it is trying to probe a device that exists in real h/w: >> you need to provide a stub implementation in QEMU >> * the SoC's bus fabric really doesn't pass aborts back >> to the CPU; I think this is unlikely, but you can model >> it at the SoC level with a suitable default memory region > > well, that is case it seems. If it is, then we should model the SoC that way, ie find out from the hardware docs what part of the bus fabric ignores decode errors and use memory regions with the right default behaviour to cover the relevant address ranges. thanks -- PMM