From: Peter Maydell <peter.maydell@linaro.org>
To: Aaron Lindsay <alindsay@codeaurora.org>
Cc: Michael Spradling <mspradli@codeaurora.org>,
Digant Desai <digantd@codeaurora.org>,
QEMU Developers <qemu-devel@nongnu.org>,
Alistair Francis <alistair.francis@xilinx.com>,
qemu-arm <qemu-arm@nongnu.org>
Subject: Re: [Qemu-arm] [PATCH 06/13] target/arm: Filter cycle counter based on PMCCFILTR_EL0
Date: Tue, 17 Oct 2017 15:57:11 +0100 [thread overview]
Message-ID: <CAFEAcA8H-Zv0HRiMTSYFqkR0Wx7npB_N_ze9h0oovVa1tMHDRQ@mail.gmail.com> (raw)
In-Reply-To: <1506737310-21880-7-git-send-email-alindsay@codeaurora.org>
On 30 September 2017 at 03:08, Aaron Lindsay <alindsay@codeaurora.org> wrote:
> The pmu_counter_filtered and pmu_sync functions are generic (as opposed
> to PMCCNTR-specific) to allow for the implementation of other events.
>
> RFC: I know that many of the locations of the calls to pmu_sync are
> problematic when icount is enabled because can_do_io will not be set.
> The documentation says that for deterministic execution, IO must only be
> performed by the last instruction of a thread block.
Yes. You need to arrange that gen_io_start() and gen_io_end()
are called around the generation of code for operations that might
do IO or care about the state of the clock, and that we end the TB
after gen_io_end().
> Because
> cpu_handle_interrupt() and cpu_handle_exception() are actually made
> outside of a thread block, is it safe to set can_do_io=1 for them to
> allow this to succeed? Is there a better mechanism for handling this?
From my reading of the code, can_do_io should already be 1
when these functions are called. It's only set to 0 just
before we call tcg_qemu_tb_exec() and then set back to 1
immediately after (see cpu_tb_exec()).
In general, the approach you have here looks like it's going to
be pretty invasive and also hard to keep working right. I think
we can come up with something a bit better.
Specifically, the filtering criteria effectively only change
when we change exception level, right? (since you can only
change security state as part of an exception level change).
We already have a mechanism for getting a callback when the EL
changes -- arm_register_el_change_hook(). (We would need to
upgrade it to support more than one hook function.)
You still need to get the io-count handling right, but there
are many fewer places that need to change (just the codegen
for calls to exception-return helpers, I think) and they already
end the TB, so you don't have the complexity of trying to end the
TB in places you didn't before, you just need the gen_io_start/end.
thanks
-- PMM
next prev parent reply other threads:[~2017-10-17 14:57 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-30 2:08 [Qemu-arm] [PATCH v2 00/13] More fully implement ARM PMUv3 Aaron Lindsay
2017-09-30 2:08 ` [Qemu-arm] [PATCH 01/13] target/arm: A53: Initialize PMCEID[0] Aaron Lindsay
2017-09-30 2:08 ` [Qemu-arm] [PATCH 02/13] target/arm: Check PMCNTEN for whether PMCCNTR is enabled Aaron Lindsay
2017-10-17 12:49 ` [Qemu-devel] " Peter Maydell
2017-10-17 14:59 ` [Qemu-arm] " Aaron Lindsay
2017-10-17 15:00 ` Peter Maydell
2017-09-30 2:08 ` [Qemu-arm] [PATCH 03/13] target/arm: Reorganize PMCCNTR read, write, sync Aaron Lindsay
2017-10-17 13:25 ` Peter Maydell
2017-10-17 15:26 ` Aaron Lindsay
2017-09-30 2:08 ` [Qemu-arm] [PATCH 04/13] target/arm: Mask PMU register writes based on PMCR_EL0.N Aaron Lindsay
2017-10-17 13:41 ` [Qemu-devel] " Peter Maydell
2017-10-17 15:42 ` [Qemu-arm] " Aaron Lindsay
2017-09-30 2:08 ` [Qemu-arm] [PATCH 05/13] target/arm: Allow AArch32 access for PMCCFILTR Aaron Lindsay
2017-10-17 13:52 ` [Qemu-devel] " Peter Maydell
2017-09-30 2:08 ` [Qemu-arm] [PATCH 06/13] target/arm: Filter cycle counter based on PMCCFILTR_EL0 Aaron Lindsay
2017-10-17 14:57 ` Peter Maydell [this message]
2017-10-17 19:32 ` Aaron Lindsay
2017-09-30 2:08 ` [Qemu-arm] [PATCH 07/13] target/arm: Implement PMOVSSET Aaron Lindsay
2017-10-17 14:19 ` Peter Maydell
2017-10-17 16:02 ` Aaron Lindsay
2017-09-30 2:08 ` [Qemu-arm] [PATCH 08/13] target/arm: Split arm_ccnt_enabled into generic pmu_counter_enabled Aaron Lindsay
2017-10-17 14:04 ` Peter Maydell
2017-09-30 2:08 ` [Qemu-devel] [PATCH 09/13] target/arm: Add array for supported PMU events, generate PMCEID[01] Aaron Lindsay
2017-09-30 2:08 ` [Qemu-arm] [PATCH 10/13] target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER Aaron Lindsay
2017-09-30 2:08 ` [Qemu-arm] [PATCH 11/13] target/arm: PMU: Add instruction and cycle events Aaron Lindsay
2017-09-30 2:08 ` [Qemu-arm] [PATCH 12/13] target/arm: PMU: Set PMCR.N to 4 Aaron Lindsay
2017-09-30 2:08 ` [Qemu-devel] [PATCH 13/13] target/arm: Implement PMSWINC Aaron Lindsay
2017-10-09 14:46 ` [Qemu-arm] [PATCH v2 00/13] More fully implement ARM PMUv3 Aaron Lindsay
2017-10-09 18:27 ` Peter Maydell
2017-10-09 20:25 ` Aaron Lindsay
2017-10-17 15:09 ` [Qemu-devel] " Peter Maydell
2017-10-17 19:52 ` [Qemu-arm] " Aaron Lindsay
-- strict thread matches above, loose matches on Subject: below --
2017-04-19 17:41 [Qemu-arm] [PATCH " Aaron Lindsay
2017-04-19 17:41 ` [Qemu-arm] [PATCH 06/13] target/arm: Filter cycle counter based on PMCCFILTR_EL0 Aaron Lindsay
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