QEMU-Arm Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Zhao Liu <zhao1.liu@intel.com>
To: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
Cc: qemu-devel@nongnu.org, qemu-s390x@nongnu.org,
	qemu-ppc@nongnu.org, qemu-arm@nongnu.org,
	Paolo Bonzini <pbonzini@redhat.com>,
	qemu-riscv@nongnu.org,
	Richard Henderson <richard.henderson@linaro.org>,
	Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [PATCH v3 17/21] target/i386: Use an acquire load for interrupt_request
Date: Mon, 28 Sep 2026 14:26:59 +0800	[thread overview]
Message-ID: <aroIs/s9lhoqUrlS@intel.com> (raw)
In-Reply-To: <20260923171116.31276-18-philmd@oss.qualcomm.com>

On Wed, Sep 23, 2026 at 07:11:11PM +0200, Philippe Mathieu-Daudé wrote:
> Date: Wed, 23 Sep 2026 19:11:11 +0200
> From: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
> Subject: [PATCH v3 17/21] target/i386: Use an acquire load for
>  interrupt_request
> X-Mailer: git-send-email 2.53.0
> 
> x86_cpu_has_work() may run without the BQL, but currently reads
> CPUState::interrupt_request directly. Other threads update this
> field with qatomic_or() in cpu_set_interrupt(), so the direct
> read races with an atomic access.
> 
> Load the interrupt request with qatomic_load_acquire(), matching
> cpu_test_interrupt(). This provides the acquire ordering required
> before x86_cpu_pending_interrupt() inspects the CPU state.
> 
> Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
> ---
>  target/i386/cpu.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

(and I agree with Richard's comment :-))

Regards,
Zhao



  parent reply	other threads:[~2026-09-28  6:27 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-23 17:10 [PATCH v3 00/21] accel/tcg: Make halt-to-exec transition explicit and remove cpu_exec_halt Philippe Mathieu-Daudé
2026-09-23 17:10 ` [PATCH v3 01/21] system: Document has_work() synchronization requirements Philippe Mathieu-Daudé
2026-09-23 17:10 ` [PATCH v3 02/21] target/s390x: Use s390_cpu_get_state() consistently Philippe Mathieu-Daudé
2026-09-23 17:10 ` [PATCH v3 03/21] target/s390x: Make s390_cpu_set_state() return void Philippe Mathieu-Daudé
2026-09-23 17:10 ` [PATCH v3 04/21] target/s390x: Use S390CpuState for CPU state APIs Philippe Mathieu-Daudé
2026-09-23 17:32   ` Eric Farman
2026-09-23 17:10 ` [PATCH v3 05/21] target/s390x: Access S390CpuState atomically Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 06/21] target/arm: Un-inline arm_set_cpu_power_state() Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 07/21] target/arm: Kick vCPU after updating PSCI power state Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 08/21] target/arm: Access PSCI state atomically Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 09/21] target/arm: Access halt " Philippe Mathieu-Daudé
2026-09-23 17:29   ` Richard Henderson
2026-09-23 17:11 ` [PATCH v3 10/21] target/riscv: Skip empty MIP updates Philippe Mathieu-Daudé
2026-09-23 19:02   ` Richard Henderson
2026-09-23 17:11 ` [PATCH v3 11/21] target/riscv: Add riscv_cpu_get_mip() Philippe Mathieu-Daudé
2026-09-23 19:04   ` Richard Henderson
2026-09-23 17:11 ` [PATCH v3 12/21] target/riscv: Access MIP atomically Philippe Mathieu-Daudé
2026-09-23 19:05   ` Richard Henderson
2026-09-23 17:11 ` [PATCH v3 13/21] accel/tcg: Refactor poll-while-halted flow in cpu_exec() Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 14/21] accel/tcg: Introduce poll_during_halt() and leaving_halt() Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 15/21] target/arm: Split leaving-halt handling from arm_cpu_exec_halt() Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 16/21] target/arm: Convert cpu_exec_halt() to leaving_halt() Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 17/21] target/i386: Use an acquire load for interrupt_request Philippe Mathieu-Daudé
2026-09-23 19:18   ` Richard Henderson
2026-09-28  6:26   ` Zhao Liu [this message]
2026-09-23 17:11 ` [PATCH v3 18/21] target/i386: Split APIC polling from x86_cpu_exec_halt() Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 19/21] target/i386: Split leaving-halt handling " Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 20/21] target/i386: Use generic halt transition handlers Philippe Mathieu-Daudé
2026-09-23 17:11 ` [PATCH v3 21/21] accel/tcg: Remove the redundant cpu_exec_halt() hook Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=aroIs/s9lhoqUrlS@intel.com \
    --to=zhao1.liu@intel.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=philmd@oss.qualcomm.com \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=qemu-s390x@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox