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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id x3sm36857695pff.87.2018.05.03.10.18.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 May 2018 10:18:43 -0700 (PDT) To: Peter Maydell References: <20180427002651.28356-1-richard.henderson@linaro.org> <20180427002651.28356-8-richard.henderson@linaro.org> From: Richard Henderson Openpgp: preference=signencrypt Message-ID: Date: Thu, 3 May 2018 10:18:41 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::232 Subject: Re: [Qemu-arm] [PATCH 7/9] target/arm: Fill in disas_ldst_atomic X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm , QEMU Developers Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: I5Qm5isYVbys On 05/03/2018 07:14 AM, Peter Maydell wrote: >> + /* The tcg atomic primitives are all full barriers. Therefore we >> + * can ignore the Acquire and Release bits of this instruction. >> + */ >> + fn(cpu_reg(s, rt), tcg_rn, tcg_rs, get_mem_index(s), >> + s->be_data | size | MO_ALIGN); > > Does this definitely do the arithmetic operation at the datatype > size and not the _i64 size ? (It makes a difference for example > with LDEORB if Rs has high bits set: the result should always > have [31:8] zero.) Yes. Also recall that this returns the original data not the result of the expression. r~