Re: [SPAM] [PATCH v1 08/21] hw/arm/ast27x0: Add SCU alias for SSP and ensure correct device realization order

["Cédric Le Goater" <clg@redhat.com>]

Hello Jamin,

On 9/26/25 05:13, Jamin Lin wrote:
> Hi Cédric
> 
>>>>>> 3. Migrate all ASPEED coprocessors (e.g. SSP/TSP) to a common
>>>>> AspeedCoprocessorState.
>>>>>
>>>>> Is 'AspeedCoprocessorState' a new model structure minimizing the
>>>>> number of sub controllers ? if so, looks good. Could be merged fairly
>> quickly.
>>>>>
>>>>
>>>> Yes, I am planning to use the new AspeedCoprocessorState instead of
>>> AspeedSoCState for SSP and TSP.
>>>> struct Aspeed27x0SSPSoCState {
>>>>       AspeedSoCState parent;  -------> Change to AspeedCoprocessorState
>>>>       AspeedINTCState intc[2];
>>>>       UnimplementedDeviceState ipc[2];
>>>>       UnimplementedDeviceState scuio;
>>>>
>>>>       ARMv7MState armv7m;
>>>> };
>>>>
>>>> struct Aspeed27x0TSPSoCState {
>>>>       AspeedSoCState parent;  -------> Change to AspeedCoprocessorState
>>>>       AspeedINTCState intc[2];
>>>>       UnimplementedDeviceState ipc[2];
>>>>       UnimplementedDeviceState scuio;
>>>>
>>>>       ARMv7MState armv7m;
>>>> };
>>>> This change consolidates SSP and TSP under a common coprocessor
>>>> model, reducing duplication and aligning them with the new
>>> AspeedCoprocessorState abstraction.
>>>
>>> Aspeed27x0TSPSoCState and Aspeed27x0SSPSoCState look similar. Could
>>> they be merged ?
>>>
>> Thanks for your suggestion.
>> Will try it.
>> Jamin
>>> Thanks,
> 
> I am considering making the following APIs common so that both the Coprocessor and SoC can use them.
> 
> The Coprocessor state is AspeedCoprocessor
> The general SoC state is AspeedSoC

Yes. If you need a base class to maintain common routines, you could
introduce a parent too.

For rest, please send patches. I rather discuss on a proposal than on
an unrelated email.

Thanks,

C.