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([2602:ae:1543:f001:b25a:9949:8352:ec5d]) by smtp.gmail.com with ESMTPSA id c5-20020a170902c1c500b00163f2f9f07csm2241241plc.48.2022.06.24.13.34.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 24 Jun 2022 13:34:57 -0700 (PDT) Message-ID: Date: Fri, 24 Jun 2022 13:34:55 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH v3 22/51] target/arm: Trap AdvSIMD usage when Streaming SVE is active Content-Language: en-US To: Peter Maydell Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org References: <20220620175235.60881-1-richard.henderson@linaro.org> <20220620175235.60881-23-richard.henderson@linaro.org> From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: MGTuTMPl1wzB On 6/24/22 08:30, Peter Maydell wrote: > So the thing that worries me about structuring this this way > is that the SME supplement appendix includes this caution: > > # The instruction encoding tables in this section [...] will > # require correction if subsequent versions of the A64 ISA > # add new instructions which overlap with these encodings. > > My guess (based on how the H.a Arm ARM has incorporated > SME) is that these tables aren't going to be included > in the Arm ARM and updated going forward. Instead the > behaviour will be documented based on whether (existing > and new) instructions call CheckNonStreamingSVEEnabled() > or CheckSVEEnabled() in their pseudocode. I agree that this would be cleaner and more correct long-term. > So I'm a bit uncertain about how awkward it's going to be > in future to maintain this transliteration of the SME > supplement tables into decodetree: we might find that > we have to look at new instructions and kind of > reverse-engineer back out any required changes to the > tables here, rather than simply "write the trans_ function > for the new insn, looking at the pseudocode to see which > _access_check() function it should be calling"... I thought about this, and if it were simply a matter of annotating the trans_* functions within translate-sve.c, I would have done it. But I would need to adjust A64 AdvSIMD as well, which is still done with the by-hand decoder. Can we use this solution in the short term, and fix up advsimd while coverting it to decodetree? I'm more and more convinced we'll want this sooner than later. r~