From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1L5n6Q-0005Mu-AY for qemu-devel@nongnu.org; Thu, 27 Nov 2008 15:04:42 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1L5n6O-0005ME-Sb for qemu-devel@nongnu.org; Thu, 27 Nov 2008 15:04:41 -0500 Received: from [199.232.76.173] (port=41974 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1L5n6O-0005MB-J3 for qemu-devel@nongnu.org; Thu, 27 Nov 2008 15:04:40 -0500 Received: from ey-out-1920.google.com ([74.125.78.148]:47345) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1L5n6N-0006Xn-4Z for qemu-devel@nongnu.org; Thu, 27 Nov 2008 15:04:39 -0500 Received: by ey-out-1920.google.com with SMTP id 4so483843eyk.4 for ; Thu, 27 Nov 2008 12:04:37 -0800 (PST) From: "Stanislav" References: <20081127110220.25353.83454.stgit@dhcp-1-237.tlv.redhat.com> <492E8FCC.2020203@gmx.net> <20081127123557.GB21985@redhat.com> <000301c950c2$4e2058b0$ea610a10$@com> <492EEFF8.50802@gmx.net> In-Reply-To: <492EEFF8.50802@gmx.net> Subject: RE: [Bochs-developers] [Qemu-devel] [PATCH v5 0/5] Support for S3 ACPI state (suspend to memory) in BIOS Date: Thu, 27 Nov 2008 22:04:19 +0200 Message-ID: <000001c950cb$57f35dc0$07da1940$@com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Content-Language: en-us Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: 'Carl-Daniel Hailfinger' , qemu-devel@nongnu.org Cc: bochs-developers@lists.sourceforge.net What is the catchall emulation ? Could you explain/point me some docs ? Thanks, Stanislav -----Original Message----- From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006@gmx.net] Sent: Thursday, November 27, 2008 9:08 PM To: qemu-devel@nongnu.org Cc: bochs-developers@lists.sourceforge.net Subject: Re: [Bochs-developers] [Qemu-devel] [PATCH v5 0/5] Support for S3 ACPI state (suspend to memory) in BIOS On 27.11.2008 19:59, Stanislav wrote: > In Bochs CPU doesn't have a cache memory emulated to use it as RAM but it is > still possible to emulate cache-as-ram mode. > The problem that cache-as-ram mode is very very very processor specific and > implementation of it might be different between Intel and AMD for example. > Which one to pick up ? > I have worked on Intel, AMD and VIA implementations for Cache-as-RAM. Avi Kivity suggested a simple algorithm which is a catchall for Intel 586, Intel Core 2 Duo, AMD K8, AMD K10 and VIA C7. > Or might be better to invent some other mode especially for emulation > reasons ? > With the catchall emulation, inventing a special mode should be unneeded. Regards, Carl-Daniel -- http://www.hailfinger.org/ ------------------------------------------------------------------------- This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK & win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100&url=/ _______________________________________________ bochs-developers mailing list bochs-developers@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/bochs-developers