From: "Benjamin David Lunt" <fys@frontiernet.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] fdc reset
Date: Wed, 2 Sep 2009 11:35:56 -0700 [thread overview]
Message-ID: <001001ca2bfc$3e32ccb0$01fea8c0@fys> (raw)
Hi,
I haven't done much with QEmu, since it is not widely
used on a Windows platform. Since toshiya (?) just released
a new binary at
http://homepage3.nifty.com/takeda-toshiya/qemu/index.html
I have been able to work with it a bit more.
However, if I may make a small addition:
(Please note that I am not very familiar with the source,
so this addition may be wrong or in the wrong place.)
When the FDC is in reset, the MSR register should be 0x00,
not 0x80 which currently states that the controller is
ready to be written to.
fdc.c Line 899
/* Reset */
if (!(value & FD_DOR_nRESET)) {
+ fdctrl->msr = 0x00;
if (fdctrl->dor & FD_DOR_nRESET) {
FLOPPY_DPRINTF("controller enter RESET state\n");
}
} else {
Thanks,
Ben Lunt
reply other threads:[~2009-09-02 18:35 UTC|newest]
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