From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: maobibo <maobibo@loongson.cn>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
qemu-devel@nongnu.org
Cc: Huacai Chen <chenhuacai@kernel.org>, Song Gao <gaosong@loongson.cn>
Subject: Re: [PATCH v3 1/4] hw/intc: Remove loongarch_ipi.c
Date: Wed, 26 Jun 2024 14:10:09 +0200 [thread overview]
Message-ID: <002f4e7e-682b-479b-9c6c-8971a0e6640a@linaro.org> (raw)
In-Reply-To: <e1b8bbd8-2a9d-2417-1123-4aabfdedb684@loongson.cn>
Hi Bibo,
On 26/6/24 06:11, maobibo wrote:
>
>
> On 2024/6/5 上午10:15, Jiaxun Yang wrote:
>> It was missed out in previous commit.
>>
>> Fixes: b4a12dfc2132 ("hw/intc/loongarch_ipi: Rename as loongson_ipi")
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> ---
>> hw/intc/loongarch_ipi.c | 347
>> ------------------------------------------------
>> 1 file changed, 347 deletions(-)
>> -static void loongarch_ipi_realize(DeviceState *dev, Error **errp)
>> -{
>> - LoongArchIPI *s = LOONGARCH_IPI(dev);
>> - SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
>> - int i;
>> -
>> - if (s->num_cpu == 0) {
>> - error_setg(errp, "num-cpu must be at least 1");
>> - return;
>> - }
>> -
>> - memory_region_init_io(&s->ipi_iocsr_mem, OBJECT(dev),
>> &loongarch_ipi_ops,
>> - s, "loongarch_ipi_iocsr", 0x48);
>> -
>> - /* loongarch_ipi_iocsr performs re-entrant IO through ipi_send */
>> - s->ipi_iocsr_mem.disable_reentrancy_guard = true;
>> -
>> - sysbus_init_mmio(sbd, &s->ipi_iocsr_mem);
>> -
>> - memory_region_init_io(&s->ipi64_iocsr_mem, OBJECT(dev),
>> - &loongarch_ipi64_ops,
>> - s, "loongarch_ipi64_iocsr", 0x118);
>> - sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem);
> It is different with existing implementation.
>
> With hw/intc/loongson_ipi.c, every vcpu has one ipi_mmio_mem, however on
> loongarch ipi machine, there is no ipi_mmio_mem memory region.
>
> So if machine has 256 vcpus, there will be 256 ipi_mmio_mem memory
> regions. In function sysbus_init_mmio(), memory region can not exceed
> QDEV_MAX_MMIO (32). With so many memory regions, it slows down memory
> region search speed also.
>
> void sysbus_init_mmio(SysBusDevice *dev, MemoryRegion *memory)
> {
> int n;
>
> assert(dev->num_mmio < QDEV_MAX_MMIO);
> n = dev->num_mmio++;
> dev->mmio[n].addr = -1;
> dev->mmio[n].memory = memory;
> }
>
> Can we revert this patch? We want to do production usable by real users
> rather than show pure technology.
Since commit b4a12dfc2132 this file is not built/tested anymore:
-specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true:
files('loongarch_ipi.c'))
+specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true:
files('loongson_ipi.c'))
We don't want to maintain dead code.
Regards,
Phil.
next prev parent reply other threads:[~2024-06-26 12:11 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-05 2:15 [PATCH v3 0/4] hw/mips/loongson3_virt: Implement IPI support Jiaxun Yang
2024-06-05 2:15 ` [PATCH v3 1/4] hw/intc: Remove loongarch_ipi.c Jiaxun Yang
2024-06-05 3:32 ` gaosong
2024-06-18 11:09 ` Philippe Mathieu-Daudé
2024-06-26 4:11 ` maobibo
2024-06-26 7:40 ` Jiaxun Yang
2024-06-26 7:51 ` maobibo
2024-06-26 10:03 ` Jiaxun Yang
2024-06-26 12:10 ` Philippe Mathieu-Daudé [this message]
2024-06-27 2:44 ` gaosong
2024-06-27 13:02 ` Philippe Mathieu-Daudé
2024-07-01 1:35 ` maobibo
2024-07-01 6:44 ` maobibo
2024-07-01 7:01 ` Jiaxun Yang
2024-07-01 7:22 ` maobibo
2024-07-01 8:29 ` Jiaxun Yang
2024-07-01 8:51 ` maobibo
2024-07-01 7:08 ` Jiaxun Yang
2024-07-01 7:24 ` maobibo
2024-06-05 2:15 ` [PATCH v3 2/4] hw/intc/loongson_ipi: Provide per core MMIO address spaces Jiaxun Yang
2024-06-05 2:15 ` [PATCH v3 3/4] hw/mips/loongson3_virt: Wire up loongson_ipi device Jiaxun Yang
2024-06-18 11:17 ` Philippe Mathieu-Daudé
2024-06-18 11:24 ` Philippe Mathieu-Daudé
2024-06-05 2:15 ` [PATCH v3 4/4] hw/intc/loongson_ipi: Replace ipi_getcpu with cpu_by_arch_id Jiaxun Yang
2024-06-05 3:33 ` gaosong
2024-06-12 12:09 ` [PATCH v3 0/4] hw/mips/loongson3_virt: Implement IPI support Jiaxun Yang
2024-06-18 11:49 ` Philippe Mathieu-Daudé
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