[PATCH v3 0/2] Drop ignore_memory_transaction_failures for xilink_zynq

[PATCH v3 0/2] Drop ignore_memory_transaction_failures for xilink_zynq

[Chao Liu]

Hi all,

Following the Zynq-7000 SoC Data Sheet's "Memory Map" section (referenced at [1]),

We have identified the need to create placeholders for unimplemented devices
across the entire range of Zynq-7000 series boards.

This effort aims at ensuring maximum compatibility with different models
within the series.

The following table summarizes the relevant memory map addresses
for the Zynq-7000:

    Start Address  Size (MB)       Description
    0x0000_0000    1,024           DDR DRAM and on-chip memory (OCM)
    0x4000_0000    1,024           PL AXI slave port #0
    0x8000_0000    1,024           PL AXI slave port #1
    0xE000_0000    256             IOP devices
    0xF000_0000    128             Reserved
    0xF800_0000    32              Programmable registers access via AMBA APB bus
    0xFA00_0000    32              Reserved
    0xFC00_0000    64 MB - 256 KB  Quad-SPI linear address base address (except
                                   to 256 KB which is in OCM), 64 MB reserved,
                                   only 32 MB is currently supported
    0xFFFC_0000    256 KB          OCM when mapped to high address space

For the purposes of this patch, we will not be creating placeholders for
DRAM and any reserved regions of the address space.

A test script has been developed that covers the most common board types of
the Zynq-7000 series.

The test script obtained all linux binary images of the zynq-7000 series boards
from xilinx-wiki for script testing(referenced at [2]).

The steps to run the test are as follows:

    a) Clone the repository.
    git clone -b xilinx-zynq-test https://github.com/gevico/qemu-board.git

    b) Apply the patch attached to this email and compile QEMU.

    c) Set the environment variable for the path to your QEMU.
    export QEMU_PATH=<your qemu path>

    d) Execute the testing script.
    ./qemu-zynq-test

    e) Check the results.
    If successful, the output should resemble the following:

    Test Project: <your path>/qemu-board/hw/arm/xilinx-zynq
        Start 1: xilinx-zynq.zc702
    1/3 Test #1: xilinx-zynq.zc702 ......................   Passed
        Start 2: xilinx-zynq.zc706
    2/3 Test #2: xilinx-zynq.zc706 ......................   Passed
        Start 3: xilinx-zynq.zed  
    3/3 Test #3: xilinx-zynq.zed   ......................   Passed

    All tests passed

See:
[1]: https://www.amd.com/content/dam/xilinx/support/documents/data_sheets/ds190-Zynq-7000-Overview.pdf
[2]: http://www.wiki.xilinx.com/Zynq+2016.2+Release

Chao Liu (2):
  xilink_zynq: Add various missing unimplemented devices
  xilink-zynq-devcfg: Fix up for memory address range size not set
    correctly

 hw/arm/xilinx_zynq.c      | 12 +++++++++++-
 hw/dma/xlnx-zynq-devcfg.c |  2 +-
 2 files changed, 12 insertions(+), 2 deletions(-)

-- 
2.46.1

[PATCH v3 1/2] xilink_zynq: Add various missing unimplemented devices

[Chao Liu]

Add xilinx zynq board memory mapping is implemented in the device.

Remove a ignore_memory_transaction_failures concurrently.

Source: Zynq-7000 SoC Data Sheet: Overview, Chapter: Memory Map

See: https://www.mouser.com/datasheet/2/903/ds190_Zynq_7000_Overview-1595492.pdf
Signed-off-by: Chao Liu <chao.liu@yeah.net>
---
 hw/arm/xilinx_zynq.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 37c234f5ab..77010bebeb 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -34,6 +34,7 @@
 #include "hw/net/cadence_gem.h"
 #include "hw/cpu/a9mpcore.h"
 #include "hw/qdev-clock.h"
+#include "hw/misc/unimp.h"
 #include "sysemu/reset.h"
 #include "qom/object.h"
 #include "exec/tswap.h"
@@ -229,6 +230,16 @@ static void zynq_init(MachineState *machine)
         zynq_machine->cpu[n] = ARM_CPU(cpuobj);
     }
 
+    /* PL AXI */
+    create_unimplemented_device("zynq.pl-axi.port0", 0x40000000, 1 * GiB);
+    create_unimplemented_device("zynq.pl-axi.port1", 0x80000000, 1 * GiB);
+
+    /* IOP devices */
+    create_unimplemented_device("zynq.iop-devices", 0xE0000000, 256 * MiB);
+
+    /* Programmable register access via AMBA APB bus */
+    create_unimplemented_device("zynq.amba", 0xF8000000, 32 * MiB);
+
     /* DDR remapped to address zero.  */
     memory_region_add_subregion(address_space_mem, 0, machine->ram);
 
@@ -394,7 +405,6 @@ static void zynq_machine_class_init(ObjectClass *oc, void *data)
     mc->init = zynq_init;
     mc->max_cpus = ZYNQ_MAX_CPUS;
     mc->no_sdcard = 1;
-    mc->ignore_memory_transaction_failures = true;
     mc->valid_cpu_types = valid_cpu_types;
     mc->default_ram_id = "zynq.ext_ram";
     prop = object_class_property_add_str(oc, "boot-mode", NULL,
-- 
2.46.1

Re: [PATCH v3 1/2] xilink_zynq: Add various missing unimplemented devices

[Peter Maydell]

On Sat, 5 Oct 2024 at 17:06, Chao Liu <chao.liu@yeah.net> wrote:
>
> Add xilinx zynq board memory mapping is implemented in the device.
>
> Remove a ignore_memory_transaction_failures concurrently.
>
> Source: Zynq-7000 SoC Data Sheet: Overview, Chapter: Memory Map
>
> See: https://www.mouser.com/datasheet/2/903/ds190_Zynq_7000_Overview-1595492.pdf
> Signed-off-by: Chao Liu <chao.liu@yeah.net>
> ---
>  hw/arm/xilinx_zynq.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> index 37c234f5ab..77010bebeb 100644
> --- a/hw/arm/xilinx_zynq.c
> +++ b/hw/arm/xilinx_zynq.c
> @@ -34,6 +34,7 @@
>  #include "hw/net/cadence_gem.h"
>  #include "hw/cpu/a9mpcore.h"
>  #include "hw/qdev-clock.h"
> +#include "hw/misc/unimp.h"
>  #include "sysemu/reset.h"
>  #include "qom/object.h"
>  #include "exec/tswap.h"
> @@ -229,6 +230,16 @@ static void zynq_init(MachineState *machine)
>          zynq_machine->cpu[n] = ARM_CPU(cpuobj);
>      }
>
> +    /* PL AXI */
> +    create_unimplemented_device("zynq.pl-axi.port0", 0x40000000, 1 * GiB);
> +    create_unimplemented_device("zynq.pl-axi.port1", 0x80000000, 1 * GiB);
> +
> +    /* IOP devices */
> +    create_unimplemented_device("zynq.iop-devices", 0xE0000000, 256 * MiB);

These clearly are not devices, they are covering a big range
of memory space. What is the behaviour of the real hardware
if you access these address space ranges?

> +    /* Programmable register access via AMBA APB bus */
> +    create_unimplemented_device("zynq.amba", 0xF8000000, 32 * MiB);
> +
>      /* DDR remapped to address zero.  */
>      memory_region_add_subregion(address_space_mem, 0, machine->ram);
>
> @@ -394,7 +405,6 @@ static void zynq_machine_class_init(ObjectClass *oc, void *data)
>      mc->init = zynq_init;
>      mc->max_cpus = ZYNQ_MAX_CPUS;
>      mc->no_sdcard = 1;
> -    mc->ignore_memory_transaction_failures = true;

As I've said in my review on the previous series, there is no point
in adding big "unimplemented device" ranges merely in order to
remove the setting of ignore_memory_transaction_failures.

thanks
-- PMM

[PATCH v3 2/2] xilink-zynq-devcfg: Fix up for memory address range size not set correctly

[Chao Liu]

diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c
index b8544d0731..7170353a62 100644
--- a/hw/dma/xlnx-zynq-devcfg.c
+++ b/hw/dma/xlnx-zynq-devcfg.c
@@ -372,7 +372,7 @@ static void xlnx_zynq_devcfg_init(Object *obj)
                               s->regs_info, s->regs,
                               &xlnx_zynq_devcfg_reg_ops,
                               XLNX_ZYNQ_DEVCFG_ERR_DEBUG,
-                              XLNX_ZYNQ_DEVCFG_R_MAX);
+                              XLNX_ZYNQ_DEVCFG_R_MAX * 4);
     memory_region_add_subregion(&s->iomem,
                                 A_CTRL,
                                 &reg_array->mem);
-- 
2.46.1