[Qemu-devel] New x86 BIOS image

[Qemu-devel] New x86 BIOS image

[Aurelien Jarno]

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Hi all,

I have built a new x86 BIOS image from the latest Bochs CVS. Among the
nice fixes and improvements, the main ones are:
 - boot menu, accessible with F12
 - LBA48 support
 - basic implementation of SMBIOS

I had a problem with SMP support, as the delay between the launch of the
SIPI and the read of the number of CPU was too short. It was controlled
by a simple delay loop which seems to be too short now. Instead of 
waiting an arbitrary amount of time, I use the same solution as the one
choosen in KVM, that is to export the number of CPUs in the NVRAM. A
patch for that has been post among the KVM patches by Anthony Liguori.

You will find attached the new BIOS in binary format, the patch against 
the latest Bochs CVS I used to build it, and a small patch to apply to 
QEMU. To use it, apply the QEMU patch, and put the new bios in the
pc-bios directory. It should then be installed at the correct location
by "make install".

I currently have found no regressions with it, but as it is a very 
sensitive part, I would like to get it more widely tested. I am waiting 
for your comments.

Thanks,
Aurelien

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

[-- Attachment #2: bios.bin --]
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[-- Attachment #3: bios.diff --]
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Index: rombios.h
===================================================================
RCS file: /cvsroot/bochs/bochs/bios/rombios.h,v
retrieving revision 1.6
diff -u -d -p -r1.6 rombios.h
--- rombios.h	26 Jan 2008 09:15:27 -0000	1.6
+++ rombios.h	13 Mar 2008 12:58:57 -0000
@@ -19,7 +19,7 @@
 //  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301 USA
 
 /* define it to include QEMU specific code */
-//#define BX_QEMU
+#define BX_QEMU
 
 #ifndef LEGACY
 #  define BX_ROMBIOS32     1
Index: rombios32.c
===================================================================
RCS file: /cvsroot/bochs/bochs/bios/rombios32.c,v
retrieving revision 1.24
diff -u -d -p -r1.24 rombios32.c
--- rombios32.c	6 Mar 2008 20:18:20 -0000	1.24
+++ rombios32.c	13 Mar 2008 12:58:58 -0000
@@ -476,8 +476,19 @@ void smp_probe(void)
         writel(APIC_BASE + APIC_ICR_LOW, 0x000C4500);
         sipi_vector = AP_BOOT_ADDR >> 12;
         writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
+        asm volatile(
+                     "xor %%eax, %%eax \n\t"
+                     "xor %%edx, %%edx \n\t"
+                     "mov $0x10, %%ecx \n\t"
+                     "wrmsr"
+                     : : : "eax", "ecx", "edx");
 
+#ifndef BX_QEMU
         delay_ms(10);
+#else
+        while (cmos_readb(0x5f) + 1 != readw((void *)CPU_COUNT_ADDR))
+           ;
+#endif
 
         smp_cpus = readw((void *)CPU_COUNT_ADDR);
     }

[-- Attachment #4: 0001-Tell-BIOS-about-the-number-of-CPUs.patch --]
[-- Type: text/x-diff, Size: 1030 bytes --]

>From 62068b8856705dcc4e1c051b6a28233a747c39c9 Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Thu, 13 Mar 2008 14:02:04 +0100
Subject: [PATCH] Tell BIOS about the number of CPUs

Previously, the BIOS would probe the CPUs for SMP guests.  This tends to be
very unreliably because of startup timing issues.  By passing the number of
CPUs in the CMOS, the BIOS can detect the number of CPUs much more reliably.

(Anthony Liguori)
---
 hw/pc.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index b3885e8..7348e60 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -213,6 +213,9 @@ static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **
     rtc_set_memory(s, 0x34, val);
     rtc_set_memory(s, 0x35, val >> 8);
 
+    /* set the number of CPU */
+    rtc_set_memory(s, 0x5f, smp_cpus - 1);
+
     /* set boot devices, and disable floppy signature check if requested */
 #define PC_MAX_BOOT_DEVICES 3
     nbds = strlen(boot_device);
-- 
1.5.4.3

[Qemu-devel] Re: New x86 BIOS image

[Sebastian Herbszt]

Aurelien,

> I had a problem with SMP support, as the delay between the launch of
> the
> SIPI and the read of the number of CPU was too short. It was
> controlled
> by a simple delay loop which seems to be too short now. Instead of
> waiting an arbitrary amount of time, I use the same solution as the
> one
> choosen in KVM, that is to export the number of CPUs in the NVRAM. A
> patch for that has been post among the KVM patches by Anthony Liguori.

bios.diff also includes part of "kvm: bios: sync tsc on bootup" patch
from kvm (git commit 9c34f44a1df4d10bc4d394b924e8de50e7012000).
Did it slip in or did you intend to include it and just missed to 
mention it?

- Sebastian

Re: [Qemu-devel] Re: New x86 BIOS image

[Aurelien Jarno]

Sebastian Herbszt a écrit :
> Aurelien,
> 
>> I had a problem with SMP support, as the delay between the launch of
>> the
>> SIPI and the read of the number of CPU was too short. It was
>> controlled
>> by a simple delay loop which seems to be too short now. Instead of
>> waiting an arbitrary amount of time, I use the same solution as the
>> one
>> choosen in KVM, that is to export the number of CPUs in the NVRAM. A
>> patch for that has been post among the KVM patches by Anthony Liguori.
> 
> bios.diff also includes part of "kvm: bios: sync tsc on bootup" patch
> from kvm (git commit 9c34f44a1df4d10bc4d394b924e8de50e7012000).
> Did it slip in or did you intend to include it and just missed to
> mention it?
> 

It actually slipped into it. I will remove this part before building the
final image.


-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net