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Subject: Re: [Qemu-devel] x86_64 target
Date: Wed, 5 Jan 2005 11:48:13 -0600
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From: "Paul Brook"

> On Tuesday 04 January 2005 02:15, Karl Magdsick wrote:
>> The EMT Xeons implement all of the amd64 instructions that were in an
>> early release of the instruction set reference, so I think a single
>=20
> The Intel chips actually implement all the instructions except 3DNOW =
and add=20
> SSE3, same as p4 vs. AthlonXP. These are the only instruction set=20
> differences, and the only differences that are visible from userspace.

Actually, I thought the Intel chips did *not* implement the full x86-64 =
instruction set.  That's what a few early reports were saying.

They made their 64 bit version using a draft of the initial 64 bit =
specs, but AMD made some changes right at the end, and as a result the =
Intel chips (and AMD's own initial batch of chips) don't fully support =
the x86-64 instruction set.

I haven't been keeping track, but I haven't heard of any changes from =
Intel to implement the missing instruction(s).