From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HiaFf-0008Im-SU for qemu-devel@nongnu.org; Mon, 30 Apr 2007 14:05:32 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HiaFe-0008Ia-17 for qemu-devel@nongnu.org; Mon, 30 Apr 2007 14:05:30 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HiaFd-0008IV-Rd for qemu-devel@nongnu.org; Mon, 30 Apr 2007 14:05:29 -0400 Received: from mx.globalone.ru ([194.84.254.251]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Hia9P-00059E-B1 for qemu-devel@nongnu.org; Mon, 30 Apr 2007 13:59:04 -0400 Received: from mx.globalone.ru (localhost [127.0.0.1]) by mx.globalone.ru (8.13.1/8.13.1) with ESMTP id l3UHwtlc003588 for ; Mon, 30 Apr 2007 21:58:55 +0400 Received: from smtp.globalone.ru (smtp.globalone.ru [172.16.38.5]) by mx.globalone.ru (8.13.1/8.13.1) with ESMTP id l3UHwi8n003568 for ; Mon, 30 Apr 2007 21:58:45 +0400 Received: from voropaya ([172.16.38.7]) by smtp.globalone.ru (Netscape Messaging Server 4.15) with SMTP id JHBOLW00.09E for ; Mon, 30 Apr 2007 21:58:44 +0400 Message-ID: <008b01c78b51$6979f2c0$e90d11ac@spb.in.rosprint.ru> From: "Alexander Voropay" Date: Mon, 30 Apr 2007 22:00:11 +0400 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0087_01C78B72.ECB7A760" Subject: [Qemu-devel] [Experimental PATCH]: MIPS Malta YAMON for NetBSD Reply-To: Alexander Voropay , qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is a multi-part message in MIME format. ------=_NextPart_000_0087_01C78B72.ECB7A760 Content-Type: multipart/alternative; boundary="----=_NextPart_001_0088_01C78B72.ECBA1860" ------=_NextPart_001_0088_01C78B72.ECBA1860 Content-Type: text/plain; charset="koi8-r" Content-Transfer-Encoding: quoted-printable Hi! This patch add a simply YAMON services ( print() and print_count() ) to Malta pseudo-loader. This services are requred for NetBSD to run. As a result, an *unmodified* NetBSD 3.0 kernel starts to work but hangs very early on the PCNET PCI Ethernet (IRQ=3D0). The PCI is not = initialized and NetBSD Malta does not contains a PCI fuxup routines. P.S. The Malta bootloader must acts as PCI BIOS to run NetBSD 3.0 and Linux 2.4 . $ qemu-system-mipsel -M malta -nographic -cpu 4Kc -kernel = ../Malta/netbsd-MALTA Could not configure '/dev/rtc' to have a 1024 Hz timer. This is not a = fatal error, but for better emulation accuracy either use a 2.6 host Linux = kernel or type 'echo 1024 > /proc/sys/dev/rtc/max-user-freq' as root. MIPS32/64 params: cpu arch: 32 MIPS32/64 params: TLB entries: 16 MIPS32/64 params: Icache: line =3D 16, total =3D 2048, ways =3D 2 sets =3D 64 MIPS32/64 params: Dcache: line =3D 16, total =3D 2048, ways =3D 2 sets =3D 64 picache_stride =3D 1024 picache_loopcount =3D 2 pdcache_stride =3D 1024 pdcache_loopcount =3D 2 Timer calibration: 199945600 cycles/sec [(6198300, 6298300) * 16] Loaded initial symtab at 0x802dab24, strtab at 0x802ec834, # entries = 4473 Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 The NetBSD Foundation, Inc. All rights reserved. Copyright (c) 1982, 1986, 1989, 1991, 1993 The Regents of the University of California. All rights reserved. NetBSD 3.0 (MALTA) #0: Sun Dec 18 23:01:15 UTC 2005 = builds@b4.netbsd.org:/home/builds/ab/netbsd-3-0-RELEASE/evbmips-mipsel/20= 0512182024Z-obj/home/builds/ab/netbsd-3-0-RELEASE/src/sys/arch/evbmips/co= mpile/MALTA total memory =3D 128 MB avail memory =3D 121 MB mainbus0 (root) cpu0 at mainbus0: 199.94MHz (hz cycles =3D 999728, delay divisor =3D = 100) cpu0: MIPS 4Kc (0x18000) Rev. 0 with software emulated floating point cpu0: 2KB/16B 2-way set-associative L1 Instruction cache, 16 TLB entries cpu0: 2KB/16B 2-way set-associative write-back L1 Data cache gt0 at mainbus0 addr 0x1be00000 pci0 at gt0 pci0: i/o space, memory space enabled Galileo (Marvell) Technology GT-64120 System Controller (miscellaneous = memory, revision 0x10) at pci0 dev 0 function 0 not configured pcib0 at pci0 dev 10 function 0 pcib0: Intel 82371AB (PIIX4) PCI-ISA Bridge, (rev . 0x00) pciide0 at pci0 dev 10 function 1 pciide0: Intel 82371SB (PIIX3) IDE Interface (rev. 0x00) pciide0: device disabled (at device) uhci0 at pci0 dev 10 function 2: Intel 82371SB (PIIX3) USB Host = Controller (rev. 0x01) uhci0: can't map i/o space Intel 82371AB (PIIX4) Power Management Controller (miscellaneous bridge) = at pci0 dev 10 function 3 not configured pcn0 at pci0 dev 11 function 0: AMD PCnet-PCI Ethernet pcn0: Unknown PCnet-PCI variant rev 7, Ethernet address = 00:00:00:00:00:00 panic: pcib_isa_intr_string: bogus isa irq 0x0 Stopped in pid 0.1 (swapper) at netbsd:cpu_Debugger+0x4: jr = ra bdslot: nop db> -- -=3DAV=3D- ------=_NextPart_001_0088_01C78B72.ECBA1860 Content-Type: text/html; charset="koi8-r" Content-Transfer-Encoding: quoted-printable
Hi!
 
 This patch add a simply YAMON = services (=20 print() and print_count()  )
to Malta pseudo-loader. This services = are requred=20 for NetBSD to run.
 
 As a result, an *unmodified* = NetBSD=20 3.0 kernel starts to work but hangs
very early on the PCNET PCI Ethernet (IRQ=3D0). The PCI is not = initialized
and NetBSD Malta=20 does not contains a PCI fuxup routines.
 
P.S. The Malta bootloader must = acts as PCI=20 BIOS to run NetBSD 3.0
and Linux 2.4 .
 
 
 
$ qemu-system-mipsel -M malta = -nographic -cpu=20 4Kc  -kernel ../Malta/netbsd-MALTA
 
Could not configure '/dev/rtc' to have = a 1024 Hz=20 timer. This is not a fatal
error, but for better emulation accuracy = either=20 use a 2.6 host Linux kernel or
type 'echo 1024 >=20 /proc/sys/dev/rtc/max-user-freq' as root.
MIPS32/64 params: cpu arch: = 32
MIPS32/64 params:=20 TLB entries: 16
MIPS32/64 params: Icache: line =3D 16, total =3D = 2048, ways =3D=20 2
           &n= bsp;    =20 sets =3D 64
MIPS32/64 params: Dcache: line =3D 16, total =3D 2048, = ways =3D=20 2
           &n= bsp;    =20 sets =3D 64
  picache_stride    =3D = 1024
 =20 picache_loopcount =3D 2
  pdcache_stride    =3D=20 1024
  pdcache_loopcount =3D 2
Timer calibration: 199945600 = cycles/sec=20 [(6198300, 6298300) * 16]
Loaded initial symtab at 0x802dab24, strtab = at=20 0x802ec834, # entries 4473
Copyright (c) 1996, 1997, 1998, 1999, = 2000, 2001,=20 2002, 2003, 2004, 2005
    The NetBSD Foundation, = Inc. =20 All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991,=20 1993
    The Regents of the University of = California. =20 All rights reserved.
 
NetBSD 3.0 (MALTA) #0: Sun Dec 18 = 23:01:15 UTC=20 2005
        builds@b4.netbsd.org:/home/builds/ab/netbsd-3= -0-RELEASE/evbmips-mipsel/200512182024Z-obj/home/builds/ab/netbsd-3-0-REL= EASE/src/sys/arch/evbmips/compile/MALTA
total=20 memory =3D 128 MB
avail memory =3D 121 MB
mainbus0 (root)
cpu0 = at mainbus0:=20 199.94MHz (hz cycles =3D 999728, delay divisor =3D 100)
cpu0: MIPS = 4Kc (0x18000)=20 Rev. 0 with software emulated floating point
cpu0: 2KB/16B 2-way=20 set-associative L1 Instruction cache, 16 TLB entries
cpu0: 2KB/16B = 2-way=20 set-associative write-back L1 Data cache
gt0 at mainbus0 addr=20 0x1be00000
pci0 at gt0
pci0: i/o space, memory space = enabled
Galileo=20 (Marvell) Technology GT-64120 System Controller (miscellaneous memory, = revision=20 0x10) at pci0 dev 0 function 0 not configured
pcib0 at pci0 dev 10 = function=20 0
pcib0: Intel 82371AB (PIIX4) PCI-ISA Bridge, (rev . = 0x00)
pciide0 at=20 pci0 dev 10 function 1
pciide0: Intel 82371SB (PIIX3) IDE Interface = (rev.=20 0x00)
pciide0: device disabled (at device)
uhci0 at pci0 dev 10 = function=20 2: Intel 82371SB (PIIX3) USB Host Controller (rev. 0x01)
uhci0: can't = map i/o=20 space
Intel 82371AB (PIIX4) Power Management Controller = (miscellaneous=20 bridge) at pci0 dev 10 function 3 not configured
pcn0 at pci0 dev 11 = function=20 0: AMD PCnet-PCI Ethernet
pcn0: Unknown PCnet-PCI variant rev 7, = Ethernet=20 address 00:00:00:00:00:00
panic: pcib_isa_intr_string: bogus isa irq=20 0x0
Stopped in pid 0.1 (swapper) at=20 netbsd:cpu_Debugger+0x4:       =20 jr     =20 ra
           &= nbsp;   =20 bdslot: nop
db>
 
--
-=3DAV=3D-
------=_NextPart_001_0088_01C78B72.ECBA1860-- ------=_NextPart_000_0087_01C78B72.ECB7A760 Content-Type: application/octet-stream; name="malta_yamon.diff" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="malta_yamon.diff" --- qemu-CVS/qemu/hw/mips_malta.c 2007-04-30 18:35:26.000000000 +0400=0A= +++ qemu-20070430/hw/mips_malta.c 2007-04-30 21:19:42.135752576 +0400=0A= @@ -535,11 +535,27 @@=0A= =0A= /* Small bootloader */=0A= p =3D (uint32_t *) (phys_ram_base + bios_offset);=0A= - stl_raw(p++, 0x0bf00006); /* j = 0x1fc00018 */=0A= + stl_raw(p++, 0x0bf00160); /* j = 0x1fc00580 */=0A= stl_raw(p++, 0x00000000); /* = nop */=0A= =0A= + /* YAMON service vector */=0A= + stl_raw(phys_ram_base + bios_offset + 0x500, 0xbfc00580); /* = start: */ =0A= + stl_raw(phys_ram_base + bios_offset + 0x504, 0xbfc0083c); /* = print_count: */=0A= + stl_raw(phys_ram_base + bios_offset + 0x520, 0xbfc00580); /* = start: */ =0A= + stl_raw(phys_ram_base + bios_offset + 0x52c, 0xbfc00800); /* = flush_cache: */=0A= + stl_raw(phys_ram_base + bios_offset + 0x534, 0xbfc00808); /* = print: */=0A= + stl_raw(phys_ram_base + bios_offset + 0x538, 0xbfc00800); /* = reg_cpu_isr: */=0A= + stl_raw(phys_ram_base + bios_offset + 0x53c, 0xbfc00800); /* = unred_cpu_isr: */=0A= + stl_raw(phys_ram_base + bios_offset + 0x540, 0xbfc00800); /* = reg_ic_isr: */=0A= + stl_raw(phys_ram_base + bios_offset + 0x544, 0xbfc00800); /* = unred_ic_isr: */=0A= + stl_raw(phys_ram_base + bios_offset + 0x548, 0xbfc00800); /* = reg_esr: */=0A= + stl_raw(phys_ram_base + bios_offset + 0x54c, 0xbfc00800); /* = unreg_esr: */=0A= + stl_raw(phys_ram_base + bios_offset + 0x550, 0xbfc00800); /* = getchar: */=0A= + stl_raw(phys_ram_base + bios_offset + 0x554, 0xbfc00800); /* = syscon_read: */=0A= +=0A= +=0A= /* Second part of the bootloader */=0A= - p =3D (uint32_t *) (phys_ram_base + bios_offset + 0x018);=0A= + p =3D (uint32_t *) (phys_ram_base + bios_offset + 0x580);=0A= stl_raw(p++, 0x24040002); /* = addiu a0, zero, 2 */=0A= stl_raw(p++, 0x3c1d0000 | (((ENVP_ADDR - 64) >> 16) & 0xffff)); /* = lui sp, high(ENVP_ADDR) */=0A= stl_raw(p++, 0x37bd0000 | ((ENVP_ADDR - 64) & 0xffff)); /* = ori sp, a0, low(ENVP_ADDR) */=0A= @@ -597,6 +613,50 @@=0A= stl_raw(p++, 0x37ff0000 | (kernel_entry & 0xffff)); /* = ori ra, ra, low(kernel_entry) */=0A= stl_raw(p++, 0x03e00008); /* = jr ra */=0A= stl_raw(p++, 0x00000000); /* = nop */=0A= +=0A= + /* YAMON subroutines */=0A= + p =3D (uint32_t *) (phys_ram_base + bios_offset + 0x800);=0A= + stl_raw(p++, 0x03e00008); /* jr = ra */=0A= + stl_raw(p++, 0x24020000); /* li = v0,0 */=0A= + /* 808 YAMON print */=0A= + stl_raw(p++, 0x03e06821); /* = move t5,ra */=0A= + stl_raw(p++, 0x00805821); /* = move t3,a0 */=0A= + stl_raw(p++, 0x00a05021); /* = move t2,a1 */=0A= + stl_raw(p++, 0x91440000); /* = lbu a0,0(t2) */=0A= + stl_raw(p++, 0x254a0001); /* = addiu t2,t2,1 */=0A= + stl_raw(p++, 0x10800005); /* = beqz a0,834 */=0A= + stl_raw(p++, 0x00000000); /* = nop */=0A= + stl_raw(p++, 0x0ff0021c); /* = jal 870 */=0A= + stl_raw(p++, 0x00000000); /* = nop */=0A= + stl_raw(p++, 0x08000205); /* j = 814 */=0A= + stl_raw(p++, 0x00000000); /* = nop */=0A= + stl_raw(p++, 0x01a00008); /* jr = t5 */=0A= + stl_raw(p++, 0x01602021); /* = move a0,t3 */=0A= + /* 0x83c YAMON print_count */=0A= + stl_raw(p++, 0x03e06821); /* = move t5,ra */=0A= + stl_raw(p++, 0x00805821); /* = move t3,a0 */=0A= + stl_raw(p++, 0x00a05021); /* = move t2,a1 */=0A= + stl_raw(p++, 0x00c06021); /* = move t4,a2 */=0A= + stl_raw(p++, 0x91440000); /* = lbu a0,0(t2) */=0A= + stl_raw(p++, 0x0ff0021c); /* = jal 870 */=0A= + stl_raw(p++, 0x00000000); /* = nop */=0A= + stl_raw(p++, 0x254a0001); /* = addiu t2,t2,1 */=0A= + stl_raw(p++, 0x258cffff); /* = addiu t4,t4,-1 */=0A= + stl_raw(p++, 0x1580fffa); /* = bnez t4,84c */=0A= + stl_raw(p++, 0x00000000); /* = nop */=0A= + stl_raw(p++, 0x01a00008); /* jr = t5 */=0A= + stl_raw(p++, 0x01602021); /* = move a0,t3 */=0A= + /* 0x870 */=0A= + stl_raw(p++, 0x3c08b800); /* = lui t0,0xb400 */=0A= + stl_raw(p++, 0x350803f8); /* = ori t0,t0,0x3f8 */=0A= + stl_raw(p++, 0x91090005); /* = lbu t1,5(t0) */=0A= + stl_raw(p++, 0x00000000); /* = nop */=0A= + stl_raw(p++, 0x31290040); /* = andi t1,t1,0x40 */=0A= + stl_raw(p++, 0x1120fffc); /* = beqz t1,878 */=0A= + stl_raw(p++, 0x00000000); /* = nop */=0A= + stl_raw(p++, 0x03e00008); /* jr = ra */=0A= + stl_raw(p++, 0xa1040000); /* sb = a0,0(t0) */=0A= +=0A= }=0A= =0A= static void prom_set(int index, const char *string, ...)=0A= ------=_NextPart_000_0087_01C78B72.ECB7A760--