* [Qemu-devel] [Experimental PATCH]: MIPS Malta YAMON for NetBSD
@ 2007-04-30 18:00 Alexander Voropay
2007-04-30 18:25 ` Paul Brook
0 siblings, 1 reply; 3+ messages in thread
From: Alexander Voropay @ 2007-04-30 18:00 UTC (permalink / raw)
To: qemu-devel
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Hi!
This patch add a simply YAMON services ( print() and print_count() )
to Malta pseudo-loader. This services are requred for NetBSD to run.
As a result, an *unmodified* NetBSD 3.0 kernel starts to work but hangs
very early on the PCNET PCI Ethernet (IRQ=0). The PCI is not initialized
and NetBSD Malta does not contains a PCI fuxup routines.
P.S. The Malta bootloader must acts as PCI BIOS to run NetBSD 3.0
and Linux 2.4 .
$ qemu-system-mipsel -M malta -nographic -cpu 4Kc -kernel ../Malta/netbsd-MALTA
Could not configure '/dev/rtc' to have a 1024 Hz timer. This is not a fatal
error, but for better emulation accuracy either use a 2.6 host Linux kernel or
type 'echo 1024 > /proc/sys/dev/rtc/max-user-freq' as root.
MIPS32/64 params: cpu arch: 32
MIPS32/64 params: TLB entries: 16
MIPS32/64 params: Icache: line = 16, total = 2048, ways = 2
sets = 64
MIPS32/64 params: Dcache: line = 16, total = 2048, ways = 2
sets = 64
picache_stride = 1024
picache_loopcount = 2
pdcache_stride = 1024
pdcache_loopcount = 2
Timer calibration: 199945600 cycles/sec [(6198300, 6298300) * 16]
Loaded initial symtab at 0x802dab24, strtab at 0x802ec834, # entries 4473
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
The NetBSD Foundation, Inc. All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California. All rights reserved.
NetBSD 3.0 (MALTA) #0: Sun Dec 18 23:01:15 UTC 2005
builds@b4.netbsd.org:/home/builds/ab/netbsd-3-0-RELEASE/evbmips-mipsel/200512182024Z-obj/home/builds/ab/netbsd-3-0-RELEASE/src/sys/arch/evbmips/compile/MALTA
total memory = 128 MB
avail memory = 121 MB
mainbus0 (root)
cpu0 at mainbus0: 199.94MHz (hz cycles = 999728, delay divisor = 100)
cpu0: MIPS 4Kc (0x18000) Rev. 0 with software emulated floating point
cpu0: 2KB/16B 2-way set-associative L1 Instruction cache, 16 TLB entries
cpu0: 2KB/16B 2-way set-associative write-back L1 Data cache
gt0 at mainbus0 addr 0x1be00000
pci0 at gt0
pci0: i/o space, memory space enabled
Galileo (Marvell) Technology GT-64120 System Controller (miscellaneous memory, revision 0x10) at pci0 dev 0 function 0 not configured
pcib0 at pci0 dev 10 function 0
pcib0: Intel 82371AB (PIIX4) PCI-ISA Bridge, (rev . 0x00)
pciide0 at pci0 dev 10 function 1
pciide0: Intel 82371SB (PIIX3) IDE Interface (rev. 0x00)
pciide0: device disabled (at device)
uhci0 at pci0 dev 10 function 2: Intel 82371SB (PIIX3) USB Host Controller (rev. 0x01)
uhci0: can't map i/o space
Intel 82371AB (PIIX4) Power Management Controller (miscellaneous bridge) at pci0 dev 10 function 3 not configured
pcn0 at pci0 dev 11 function 0: AMD PCnet-PCI Ethernet
pcn0: Unknown PCnet-PCI variant rev 7, Ethernet address 00:00:00:00:00:00
panic: pcib_isa_intr_string: bogus isa irq 0x0
Stopped in pid 0.1 (swapper) at netbsd:cpu_Debugger+0x4: jr ra
bdslot: nop
db>
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-=AV=-
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--- qemu-CVS/qemu/hw/mips_malta.c 2007-04-30 18:35:26.000000000 +0400
+++ qemu-20070430/hw/mips_malta.c 2007-04-30 21:19:42.135752576 +0400
@@ -535,11 +535,27 @@
/* Small bootloader */
p = (uint32_t *) (phys_ram_base + bios_offset);
- stl_raw(p++, 0x0bf00006); /* j 0x1fc00018 */
+ stl_raw(p++, 0x0bf00160); /* j 0x1fc00580 */
stl_raw(p++, 0x00000000); /* nop */
+ /* YAMON service vector */
+ stl_raw(phys_ram_base + bios_offset + 0x500, 0xbfc00580); /* start: */
+ stl_raw(phys_ram_base + bios_offset + 0x504, 0xbfc0083c); /* print_count: */
+ stl_raw(phys_ram_base + bios_offset + 0x520, 0xbfc00580); /* start: */
+ stl_raw(phys_ram_base + bios_offset + 0x52c, 0xbfc00800); /* flush_cache: */
+ stl_raw(phys_ram_base + bios_offset + 0x534, 0xbfc00808); /* print: */
+ stl_raw(phys_ram_base + bios_offset + 0x538, 0xbfc00800); /* reg_cpu_isr: */
+ stl_raw(phys_ram_base + bios_offset + 0x53c, 0xbfc00800); /* unred_cpu_isr: */
+ stl_raw(phys_ram_base + bios_offset + 0x540, 0xbfc00800); /* reg_ic_isr: */
+ stl_raw(phys_ram_base + bios_offset + 0x544, 0xbfc00800); /* unred_ic_isr: */
+ stl_raw(phys_ram_base + bios_offset + 0x548, 0xbfc00800); /* reg_esr: */
+ stl_raw(phys_ram_base + bios_offset + 0x54c, 0xbfc00800); /* unreg_esr: */
+ stl_raw(phys_ram_base + bios_offset + 0x550, 0xbfc00800); /* getchar: */
+ stl_raw(phys_ram_base + bios_offset + 0x554, 0xbfc00800); /* syscon_read: */
+
+
/* Second part of the bootloader */
- p = (uint32_t *) (phys_ram_base + bios_offset + 0x018);
+ p = (uint32_t *) (phys_ram_base + bios_offset + 0x580);
stl_raw(p++, 0x24040002); /* addiu a0, zero, 2 */
stl_raw(p++, 0x3c1d0000 | (((ENVP_ADDR - 64) >> 16) & 0xffff)); /* lui sp, high(ENVP_ADDR) */
stl_raw(p++, 0x37bd0000 | ((ENVP_ADDR - 64) & 0xffff)); /* ori sp, a0, low(ENVP_ADDR) */
@@ -597,6 +613,50 @@
stl_raw(p++, 0x37ff0000 | (kernel_entry & 0xffff)); /* ori ra, ra, low(kernel_entry) */
stl_raw(p++, 0x03e00008); /* jr ra */
stl_raw(p++, 0x00000000); /* nop */
+
+ /* YAMON subroutines */
+ p = (uint32_t *) (phys_ram_base + bios_offset + 0x800);
+ stl_raw(p++, 0x03e00008); /* jr ra */
+ stl_raw(p++, 0x24020000); /* li v0,0 */
+ /* 808 YAMON print */
+ stl_raw(p++, 0x03e06821); /* move t5,ra */
+ stl_raw(p++, 0x00805821); /* move t3,a0 */
+ stl_raw(p++, 0x00a05021); /* move t2,a1 */
+ stl_raw(p++, 0x91440000); /* lbu a0,0(t2) */
+ stl_raw(p++, 0x254a0001); /* addiu t2,t2,1 */
+ stl_raw(p++, 0x10800005); /* beqz a0,834 */
+ stl_raw(p++, 0x00000000); /* nop */
+ stl_raw(p++, 0x0ff0021c); /* jal 870 */
+ stl_raw(p++, 0x00000000); /* nop */
+ stl_raw(p++, 0x08000205); /* j 814 */
+ stl_raw(p++, 0x00000000); /* nop */
+ stl_raw(p++, 0x01a00008); /* jr t5 */
+ stl_raw(p++, 0x01602021); /* move a0,t3 */
+ /* 0x83c YAMON print_count */
+ stl_raw(p++, 0x03e06821); /* move t5,ra */
+ stl_raw(p++, 0x00805821); /* move t3,a0 */
+ stl_raw(p++, 0x00a05021); /* move t2,a1 */
+ stl_raw(p++, 0x00c06021); /* move t4,a2 */
+ stl_raw(p++, 0x91440000); /* lbu a0,0(t2) */
+ stl_raw(p++, 0x0ff0021c); /* jal 870 */
+ stl_raw(p++, 0x00000000); /* nop */
+ stl_raw(p++, 0x254a0001); /* addiu t2,t2,1 */
+ stl_raw(p++, 0x258cffff); /* addiu t4,t4,-1 */
+ stl_raw(p++, 0x1580fffa); /* bnez t4,84c */
+ stl_raw(p++, 0x00000000); /* nop */
+ stl_raw(p++, 0x01a00008); /* jr t5 */
+ stl_raw(p++, 0x01602021); /* move a0,t3 */
+ /* 0x870 */
+ stl_raw(p++, 0x3c08b800); /* lui t0,0xb400 */
+ stl_raw(p++, 0x350803f8); /* ori t0,t0,0x3f8 */
+ stl_raw(p++, 0x91090005); /* lbu t1,5(t0) */
+ stl_raw(p++, 0x00000000); /* nop */
+ stl_raw(p++, 0x31290040); /* andi t1,t1,0x40 */
+ stl_raw(p++, 0x1120fffc); /* beqz t1,878 <outch+0x8> */
+ stl_raw(p++, 0x00000000); /* nop */
+ stl_raw(p++, 0x03e00008); /* jr ra */
+ stl_raw(p++, 0xa1040000); /* sb a0,0(t0) */
+
}
static void prom_set(int index, const char *string, ...)
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [Experimental PATCH]: MIPS Malta YAMON for NetBSD
2007-04-30 18:00 [Qemu-devel] [Experimental PATCH]: MIPS Malta YAMON for NetBSD Alexander Voropay
@ 2007-04-30 18:25 ` Paul Brook
2007-05-04 14:37 ` Thiemo Seufer
0 siblings, 1 reply; 3+ messages in thread
From: Paul Brook @ 2007-04-30 18:25 UTC (permalink / raw)
To: qemu-devel, Alexander Voropay
On Monday 30 April 2007, Alexander Voropay wrote:
> Hi!
>
> This patch add a simply YAMON services ( print() and print_count() )
> to Malta pseudo-loader. This services are requred for NetBSD to run.
>
> As a result, an *unmodified* NetBSD 3.0 kernel starts to work but hangs
> very early on the PCNET PCI Ethernet (IRQ=0). The PCI is not initialized
> and NetBSD Malta does not contains a PCI fuxup routines.
>
> P.S. The Malta bootloader must acts as PCI BIOS to run NetBSD 3.0
> and Linux 2.4 .
Isn't this "bootloader" getting big enough now to warrant building and
shipping as a separately as an actual BIOS image?
Paul
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [Experimental PATCH]: MIPS Malta YAMON for NetBSD
2007-04-30 18:25 ` Paul Brook
@ 2007-05-04 14:37 ` Thiemo Seufer
0 siblings, 0 replies; 3+ messages in thread
From: Thiemo Seufer @ 2007-05-04 14:37 UTC (permalink / raw)
To: Paul Brook; +Cc: qemu-devel, Alexander Voropay
Paul Brook wrote:
> On Monday 30 April 2007, Alexander Voropay wrote:
> > Hi!
> >
> > This patch add a simply YAMON services ( print() and print_count() )
> > to Malta pseudo-loader. This services are requred for NetBSD to run.
> >
> > As a result, an *unmodified* NetBSD 3.0 kernel starts to work but hangs
> > very early on the PCNET PCI Ethernet (IRQ=0). The PCI is not initialized
> > and NetBSD Malta does not contains a PCI fuxup routines.
> >
> > P.S. The Malta bootloader must acts as PCI BIOS to run NetBSD 3.0
> > and Linux 2.4 .
>
> Isn't this "bootloader" getting big enough now to warrant building and
> shipping as a separately as an actual BIOS image?
I committed the patch because it allows to run a number of simple
standalone programs available for Malta. But I'd say, that's it in
terms of features. Anything more should go in a separate binary.
Thiemo
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2007-05-04 14:47 UTC | newest]
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2007-04-30 18:00 [Qemu-devel] [Experimental PATCH]: MIPS Malta YAMON for NetBSD Alexander Voropay
2007-04-30 18:25 ` Paul Brook
2007-05-04 14:37 ` Thiemo Seufer
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