From: "Cédric Le Goater" <clg@kaod.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH] hw/gpio/aspeed_gpio: Avoid shift into sign bit
Date: Mon, 2 Sep 2024 07:58:42 +0200 [thread overview]
Message-ID: <00b9236f-34cf-424b-849a-bd65ba854ee5@kaod.org> (raw)
In-Reply-To: <20240830180516.2103062-1-peter.maydell@linaro.org>
On 8/30/24 20:05, Peter Maydell wrote:
> In aspeed_gpio_update() we calculate "mask = 1 << gpio", where
> gpio can be between 0 and 31. Coverity complains about this
> because 1 << 31 won't fit in a signed integer.
>
> For QEMU this isn't an error because we enable -fwrapv,
> but we can keep Coverity happy by doing the shift on
> unsigned numbers.
>
> Resolves: Coverity CID 1547742
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Applied to aspeed-next.
Thanks,
C.
prev parent reply other threads:[~2024-09-02 6:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-30 18:05 [PATCH] hw/gpio/aspeed_gpio: Avoid shift into sign bit Peter Maydell
2024-09-02 5:58 ` Cédric Le Goater [this message]
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