[PATCH] hw/gpio/aspeed_gpio: Avoid shift into sign bit

[PATCH] hw/gpio/aspeed_gpio: Avoid shift into sign bit

[Peter Maydell]

In aspeed_gpio_update() we calculate "mask = 1 << gpio", where
gpio can be between 0 and 31. Coverity complains about this
because 1 << 31 won't fit in a signed integer.

For QEMU this isn't an error because we enable -fwrapv,
but we can keep Coverity happy by doing the shift on
unsigned numbers.

Resolves: Coverity CID 1547742
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
Very minor but I'm just fixing a few easy issues on a Friday
evening :-)

 hw/gpio/aspeed_gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
index 6474bb8de5b..d6ccf63a2ff 100644
--- a/hw/gpio/aspeed_gpio.c
+++ b/hw/gpio/aspeed_gpio.c
@@ -281,7 +281,7 @@ static void aspeed_gpio_update(AspeedGPIOState *s, GPIOSets *regs,
     diff &= mode_mask;
     if (diff) {
         for (gpio = 0; gpio < ASPEED_GPIOS_PER_SET; gpio++) {
-            uint32_t mask = 1 << gpio;
+            uint32_t mask = 1U << gpio;
 
             /* If the gpio needs to be updated... */
             if (!(diff & mask)) {
-- 
2.34.1

Re: [PATCH] hw/gpio/aspeed_gpio: Avoid shift into sign bit

[Cédric Le Goater]

On 8/30/24 20:05, Peter Maydell wrote:
> In aspeed_gpio_update() we calculate "mask = 1 << gpio", where
> gpio can be between 0 and 31. Coverity complains about this
> because 1 << 31 won't fit in a signed integer.
> 
> For QEMU this isn't an error because we enable -fwrapv,
> but we can keep Coverity happy by doing the shift on
> unsigned numbers.
> 
> Resolves: Coverity CID 1547742
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Reviewed-by: Cédric Le Goater <clg@redhat.com>


Applied to aspeed-next.

Thanks,

C.