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[24.113.166.229]) by smtp.gmail.com with ESMTPSA id a17-20020aa780d1000000b0062814f38d33sm3088405pfn.170.2023.03.22.05.35.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Mar 2023 05:35:52 -0700 (PDT) Message-ID: <00c6ce77-6b50-2043-2fee-603a678e3f49@linaro.org> Date: Wed, 22 Mar 2023 05:35:50 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [RFC PATCH 40/43] target/loongarch: Implement vreplve vpack vpick Content-Language: en-US To: gaosong , qemu-devel@nongnu.org References: <20221224081633.4185445-1-gaosong@loongson.cn> <20221224081633.4185445-41-gaosong@loongson.cn> <9191ffdb-9bd7-97f4-232b-fa8f5f4d240c@loongson.cn> <5fa5ed5d-b263-ddeb-7f97-e25a56bd27cb@linaro.org> From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/22/23 01:32, gaosong wrote: > > 在 2023/3/21 下午11:55, Richard Henderson 写道: >> On 3/21/23 04:31, gaosong wrote: >>> but for this case. >>> e.g >>> vreplve_b  vd vj, rk >>> index  = gpr[rk] % (128/8); >>> Vd->B(i) = Vj->B(index); >>> tcg_gen_gvec_dup_mem(MO_8, vreg_full_offset(a->vd), offsetof(CPULoongArchState, >>> fpr[a->vj].vreg.B(index))), 16, 16 ); >>> >>> How can we get the index with cpu_env? or  need env->gpr[rk]? >>> The index type is not TCGv. >> >> For this case you would load the value Vj->B(index) into a TCGv_i32, >> >>     tcg_gen_andi_i64(t0, gpr_src(rk), 15); >> >>     // Handle endian adjustment on t0, e.g. xor 15 for big-endian? >> >>     tcg_gen_trunc_i64_ptr(t1, t0); >>     tcg_gen_add_ptr(t1, t1, cpu_env); >>     tcg_gen_ld8u_i32(t2, t1, vreg_full_offset(vj)); >> >>     // At this point t2 contains Vj->B(index) >> >>     tcg_gen_gvec_dup_i32(MO_8, vreg_full_offset(vd), 16, 16, t2); >> >> > It's weird. this is no problem  for vreplve_b,   but for vreplve_h/w/d is not correct. > > e.g vreplve h > index = gpr[rk] % 8 > Vd->H(i) = Vj->H(index); > > like this: > { >     tcg_gen_andi_i64(t0, gpr_src(ctx, a->rk, EXT_NONE), 7); >     if (HOST_BIG_ENDIAN) { >         tcg_gen_xori_i64(t0, t0, 7); >     } > >     tcg_gen_trunc_i64_ptr(t1, t0); >     tcg_gen_add_ptr(t1, t1, cpu_env); >     tcg_gen_ld16u_i32(t2, t1, vreg_full_offset(a->vj)); >     tcg_gen_gvec_dup_i32(MO_16, vreg_full_offset(a->vd), 16, 16, t2); > } > > vreplve.h    vr25,  vr31, r30 >   r30    : 000000007aab5617 >   v31    : {efd0efc1efd0efc1, efd0efc1efd0efc1} > result:  {efd0efd0efd0efd0, efd0efd0efd0efd0}, > and we get result is :  {c1efc1efc1efc1ef, c1efc1efc1efc1ef}. > my host is little-endian. You forgot to shift the index left by one bit, to turn H index into byte offset. r~