From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KgNrq-0000yB-Eg for qemu-devel@nongnu.org; Thu, 18 Sep 2008 14:04:38 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KgNrp-0000xz-Md for qemu-devel@nongnu.org; Thu, 18 Sep 2008 14:04:38 -0400 Received: from [199.232.76.173] (port=46026 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KgNrp-0000xw-KR for qemu-devel@nongnu.org; Thu, 18 Sep 2008 14:04:37 -0400 Received: from mx20.gnu.org ([199.232.41.8]:1979) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KgNrp-0007g2-5e for qemu-devel@nongnu.org; Thu, 18 Sep 2008 14:04:37 -0400 Received: from spsmtp02oc.mail2world.com ([74.202.142.106]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KgNrm-0001Bc-EA for qemu-devel@nongnu.org; Thu, 18 Sep 2008 14:04:35 -0400 From: =?iso-8859-1?Q?Torbj=F6rn_Andersson?= Date: Thu, 18 Sep 2008 20:04:26 +0200 Message-ID: <00d701c919b8$ffb3f370$ff1bda50$@tt@home.se> MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_NextPart_000_00D8_01C919C9.C33CC370" Content-Language: sv Subject: [Qemu-devel] ARM QADD broken Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Det här är ett flerdelat meddelande i MIME-format. ------=_NextPart_000_00D8_01C919C9.C33CC370 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Hi all! =20 I found a regression in target-arm, specifically the QADD instruction. = Seems to be a simple typo, but sadly quite hard to track down. I have verified the patch against a real ARM v5 CPU. =20 Btw. Could someone also tell me why op_addsub.h and the NEON extension = is licensed under GPL? Is it some kind of agreement with ARM or something = else? The reason for asking is that the QEMU license file states that = libqemu.a is released under LGPL, but some files under target-arm voids this. The = answer doesn=92t need to long but please longer than single =93because=94 J =20 Further, would an LGPL compatible replacement of op_addsub.h be accepted = and replace the current implementation? =20 Finally, I hope this patch is warmly welcomed in the target-arm camp! =20 /Torbj=F6rn =20 Index: target-arm/translate.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- target-arm/translate.c (revision 5234) +++ target-arm/translate.c (working copy) @@ -5946,7 +5946,7 @@ case 0x5: /* saturating add/subtract */ rd =3D (insn >> 12) & 0xf; rn =3D (insn >> 16) & 0xf; - tmp =3D load_reg(s, rn); + tmp =3D load_reg(s, rm); tmp2 =3D load_reg(s, rn); if (op1 & 2) gen_helper_double_saturate(tmp2, tmp2); ------=_NextPart_000_00D8_01C919C9.C33CC370 Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

Hi all!

I found a regression in = target-arm, specifically the QADD instruction. Seems to be a simple typo, but sadly quite hard to = track down.

I have verified the patch = against a real ARM v5 CPU.

Btw. Could someone also tell me = why op_addsub.h and the NEON extension is licensed under GPL? Is it some kind of = agreement with ARM or something else? The reason for asking is that the QEMU license = file states that libqemu.a is released under LGPL, but some files under = target-arm voids this. The answer doesn’t need to long but please longer than = single “because” J

Further, would an LGPL = compatible replacement of op_addsub.h be accepted and replace the current = implementation?

Finally, I hope this patch is = warmly welcomed in the target-arm camp!

/Torbj=F6rn

Index: = target-arm/translate.c

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

--- = target-arm/translate.c=A0=A0=A0=A0=A0=A0 (revision 5234)

+++ = target-arm/translate.c=A0=A0=A0 (working copy)

@@ -5946,7 +5946,7 = @@

=A0=A0=A0=A0=A0=A0=A0=A0 case = 0x5: /* saturating add/subtract */

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 rd =3D (insn >> = 12) & 0xf;

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 rn =3D (insn >> = 16) & 0xf;

-=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 tmp =3D load_reg(s, = rn);

+=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 tmp =3D load_reg(s, = rm);

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 tmp2 =3D load_reg(s, = rn);

=A0=A0=A0=A0=A0=A0=A0=A0 = =A0=A0=A0=A0if (op1 & 2)

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 gen_helper_double_saturate(tmp2, tmp2);

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