From: Helge Deller <deller@gmx.de>
To: "Gabriel Brookman" <brookmangabriel@gmail.com>,
qemu-devel@nongnu.org, "Andreas Hüttel" <andreas.huettel@ur.de>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [PATCH] target/hppa: correct size bit parity for fmpyadd
Date: Thu, 9 Oct 2025 23:41:13 +0200 [thread overview]
Message-ID: <01596a84-80e2-40ae-a305-28e4ec6fc40a@gmx.de> (raw)
In-Reply-To: <b5e928a2-f4ae-4b24-a2c0-2f67442dff2e@linaro.org>
On 10/9/25 23:23, Richard Henderson wrote:
> On 10/9/25 13:51, Gabriel Brookman wrote:
>> For the fmpyadd instruction on the hppa architecture, there is a bit
>> used to specify whether the instruction is operating on a 32 bit or 64
>> bit floating point register. For most instructions, such a bit is 0 when
>> operating on the smaller register and 1 when operating on the larger
>> register. However, according to page 6-57 of the PA-RISC 1.1 Architecture
>> and Instruction Set Reference Manual,
>
> Annoyingly, page 6-57 doesn't actually mention the interpretation of the f bit at all. However, I can see how the H specifier is processed in gas, and the confirmation of glibc fixes is nice.
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Helge Deller <deller@gmx.de>
Nice catch!
Thanks!
Helge
next prev parent reply other threads:[~2025-10-09 21:41 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-09 20:51 [PATCH] target/hppa: correct size bit parity for fmpyadd Gabriel Brookman
2025-10-09 21:23 ` Richard Henderson
2025-10-09 21:30 ` [EXT] " Andreas K. Huettel
2025-10-09 21:32 ` Richard Henderson
2025-10-09 21:41 ` Helge Deller [this message]
2025-10-16 8:49 ` Philippe Mathieu-Daudé
2025-10-16 11:10 ` [EXT] " Andreas K. Huettel
2025-10-17 5:55 ` Michael Tokarev
2025-10-17 9:24 ` Helge Deller
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