[Qemu-devel] NPTL user mode fixes

[Qemu-devel] NPTL user mode fixes

[David Munday]

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Hi,

I starting to work with qemu to enable NPTL dependent binaries to run in
user mode. I see that currently NPTL is not supported for SPARC or x86. 

 

What is still left to do for NPTL support?

 

Thanks,
David


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Re: [Qemu-devel] NPTL user mode fixes

[Blue Swirl]

On 4/27/10, David Munday <cromom@soe.ucsc.edu> wrote:
>
>
>
>
> Hi,
>
> I starting to work with qemu to enable NPTL dependent binaries to run in
> user mode. I see that currently NPTL is not supported for SPARC or x86.
>
>
>
> What is still left to do for NPTL support?

I'd start by checking what kind of changes are in the commits, which
enabled NPTL to those architectures that support it.

Then some debugging with a simple test case should do it. It should
help if you know NPTL implementation details.

Re: [Qemu-devel] NPTL user mode fixes

[Richard Henderson]

On 04/26/2010 04:00 PM, David Munday wrote:
> I starting to work with qemu to enable NPTL dependent binaries to run in
> user mode. I see that currently NPTL is not supported for SPARC or x86.
> 
> What is still left to do for NPTL support?

The thing that's missing to enable the compile with NPTL is cpu_set_tls.
For Sparc I believe this is merely an assignment to %g7.  For x86, you
need to arrange for a call to do_set_thread_area, which is currently
private to linux-user/syscall.c.

However, the other thing that will need to be fixed is that neither port
implements its atomic operations atomically -- the implementations merely
assume that only one thread is active.  See do_store_exclusive in
linux-user/main.c for how several ports handle their atomic operations.
It'll be a bit different for Sparc singe it has LDSTUB and SWAP as well
as CAS.  It'll be lots different for x86, since quite a few read-modify-write
operations can be made atomic by use of the LOCK prefix (this could be 
quite an undertaking, actually).


r~