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[200.56.192.86]) by smtp.gmail.com with ESMTPSA id s63sm716753oia.34.2019.06.07.06.42.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jun 2019 06:42:29 -0700 (PDT) To: Peter Maydell , qemu-arm , QEMU Developers References: <20190510110357.18825-1-peter.maydell@linaro.org> From: Richard Henderson Openpgp: preference=signencrypt Message-ID: <0173bcfb-436e-65ce-fff7-58cbb82bf9c1@linaro.org> Date: Fri, 7 Jun 2019 08:42:25 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::344 Subject: Re: [Qemu-devel] [PATCH v2] target/arm: Implement NSACR gating of floating point X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 6/7/19 8:06 AM, Peter Maydell wrote: > The NSACR register allows secure code to configure the FPU > to be inaccessible to non-secure code. If the NSACR.CP10 > bit is set then: > * NS accesses to the FPU trap as UNDEF (ie to NS EL1 or EL2) > * CPACR.{CP10,CP11} behave as if RAZ/WI > * HCPTR.{TCP11,TCP10} behave as if RAO/WI > > Note that we do not implement the NSACR.NSASEDIS bit which > gates only access to Advanced SIMD, in the same way that > we don't implement the equivalent CPACR.ASEDIS and HCPTR.TASE. > > Signed-off-by: Peter Maydell > --- > Changes v1->v2: > * fixed bug in cptr_el2_read() that meant we were forcing > HCPTR.{TCP11,TCP10} to 0 when they should be 1 > --- > target/arm/helper.c | 75 +++++++++++++++++++++++++++++++++++++++++++-- > 1 file changed, 73 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson r~