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[176.184.22.219]) by smtp.gmail.com with ESMTPSA id u24-20020a17090657d800b00934823127c8sm2813609ejr.78.2023.03.21.09.14.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Mar 2023 09:14:24 -0700 (PDT) Message-ID: <01b25d58-42ab-7985-75b3-effb29b92a0c@linaro.org> Date: Tue, 21 Mar 2023 17:14:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH] linux-user/mips: Low down switchable NaN2008 requirement Content-Language: en-US To: Jiaxun Yang Cc: QEMU devel , Laurent Vivier References: <20230211173401.13902-1-jiaxun.yang@flygoat.com> <616442ce-157f-2ca2-5cf8-b0f67cdf47be@linaro.org> <94E0E41A-5B77-4DE0-B45C-9561239F30B9@flygoat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <94E0E41A-5B77-4DE0-B45C-9561239F30B9@flygoat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=philmd@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 21/3/23 10:23, Jiaxun Yang wrote: >> 2023年3月15日 08:18,Philippe Mathieu-Daudé 写道: >> On 11/3/23 13:39, Jiaxun Yang wrote: >>>> 2023年3月9日 12:32,Philippe Mathieu-Daudé 写道: >>>> On 11/2/23 18:34, Jiaxun Yang wrote: >>>>> Previously switchable NaN2008 requires fcsr31.nan2008 to be writable >>>>> for guest. However as per MIPS arch spec this bit can never be writable. >>>>> This cause NaN2008 ELF to be rejected by QEMU. >>>>> NaN2008 can be enabled on R2~R5 processors, just make it available >>>>> unconditionally. >>>>> Signed-off-by: Jiaxun Yang >>>>> --- >>>>> linux-user/mips/cpu_loop.c | 3 +-- >>>>> 1 file changed, 1 insertion(+), 2 deletions(-) >>>>> diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c >>>>> index d5c1c7941d..b5c2ca4a3e 100644 >>>>> --- a/linux-user/mips/cpu_loop.c >>>>> +++ b/linux-user/mips/cpu_loop.c >>>>> @@ -301,8 +301,7 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) >>>>> } >>>>> if (((info->elf_flags & EF_MIPS_NAN2008) != 0) != >>>>> ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0)) { >>>>> - if ((env->active_fpu.fcr31_rw_bitmask & >>>>> - (1 << FCR31_NAN2008)) == 0) { >>>>> + if (!(env->insn_flags & ISA_MIPS_R2)) { >>>>> fprintf(stderr, "ELF binary's NaN mode not supported by CPU\n"); >>>>> exit(1); >>>>> } >>>> >>>> Looking at R6.06 revision history: >>>> >>>> 5.03 August 21, 2013 >>>> >>>> • ABS2008 and NAN2008 fields of Table 5.7 “FCSR RegisterField >>>> Descriptions” were optional in release 3 and could be R/W, >>>> but as of release 5 are required, read-only, and preset by >>>> hardware. >>> Well that’s because there is no CPU being marked as MIPS Release 3 in QEMU, and only >>> P5600 is marked as MIPS Release 5. >>> In reality R3 implementations are all advertising themself as R2, and later RCs of microAptiv >>> and interaptiv can all be configured as NaN2008 only. So for those CPUs we have binary compiled >>> with -march=mips32r2 -mnan=2008. >>> Given that default CPU of mips32r2 in QEMU is 24Kf, I think the best approach to deal with such >>> situation is to allow NaN2008 to be enabled for early processors for linux-user. >>> There is a NAN2008 Debian port for test: >>> http://repo.oss.cipunited.com/mipsel-nan2008/tarball/sid-mipsel-nan2008-20230309-1.tar.xz >> >> $ qemu-mipsel -L sid-mipsel-nan2008-20230313-1/usr -cpu P5600 usr/bin/uname -ms >> Linux mips >> >> What about something like: > > That would lost capability of testing NaN2008 binaries again other CPU models. Why? cpu_get_model() is just a hint, see linux-user/main.c::main(): if (cpu_model == NULL) { cpu_model = cpu_get_model(get_elf_eflags(execfd)); } >> -- >8 -- >> --- a/linux-user/mips/target_elf.h >> +++ b/linux-user/mips/target_elf.h >> @@ -15,6 +15,9 @@ static inline const char *cpu_get_model(uint32_t eflags) >> if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) { >> return "R5900"; >> } >> + if (eflags & EF_MIPS_NAN2008) { >> + return "P5600"; >> + } >> return "24Kf"; >> } >> #endif >> --- > >