From: Richard Henderson <richard.henderson@linaro.org>
To: "Peter Maydell" <peter.maydell@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PULL 00/30] tcg patch queue
Date: Fri, 4 Mar 2022 08:47:41 -1000 [thread overview]
Message-ID: <0212da77-3bed-3e06-6b55-cda90dd27779@linaro.org> (raw)
In-Reply-To: <CAFEAcA8EWNdCa7cAaVKQpuuj+0-KLfYaybjjQYUtyy+k7MVrSw@mail.gmail.com>
On 3/4/22 05:22, Peter Maydell wrote:
> This causes the linux-user tests to fail on the aarch64 host:
> https://gitlab.com/qemu-project/qemu/-/jobs/2163919769
>
> All the qemu-i386 invocations fail like this:
>
> timeout --foreground 90
> /home/gitlab-runner/builds/CMuZxyfG/0/qemu-project/qemu/build/qemu-i386
> sigbus > sigbus.out
> qemu-i386: Unable to reserve 0x100000000 bytes of virtual address
> space at 0x8000 (File exists) for use as guest address space (check
> your virtual memory ulimit setting, min_mmap_addr or reserve less
> using -R option)
Hmm. It works when run standalone on aarch64.ci.qemu.org, so it must be something within
the ci environment. Alex, any idea how to replicate this?
r~
prev parent reply other threads:[~2022-03-04 18:53 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-03 20:59 [PULL 00/30] tcg patch queue Richard Henderson
2022-03-03 20:59 ` [PULL 01/30] tcg/optimize: only read val after const check Richard Henderson
2022-03-03 20:59 ` [PULL 02/30] tcg: Set MAX_OPC_PARAM_IARGS to 7 Richard Henderson
2022-03-03 20:59 ` [PULL 03/30] tcg: Add opcodes for vector nand, nor, eqv Richard Henderson
2022-03-03 20:59 ` [PULL 04/30] tcg/ppc: Implement vector NAND, NOR, EQV Richard Henderson
2022-03-03 20:59 ` [PULL 05/30] tcg/s390x: " Richard Henderson
2022-03-03 20:59 ` [PULL 06/30] tcg/i386: Detect AVX512 Richard Henderson
2022-03-03 20:59 ` [PULL 07/30] tcg/i386: Add tcg_out_evex_opc Richard Henderson
2022-03-03 20:59 ` [PULL 08/30] tcg/i386: Use tcg_can_emit_vec_op in expand_vec_cmp_noinv Richard Henderson
2022-03-03 20:59 ` [PULL 09/30] tcg/i386: Implement avx512 variable shifts Richard Henderson
2022-03-03 20:59 ` [PULL 10/30] tcg/i386: Implement avx512 scalar shift Richard Henderson
2022-03-03 20:59 ` [PULL 11/30] tcg/i386: Implement avx512 immediate sari shift Richard Henderson
2022-03-03 20:59 ` [PULL 12/30] tcg/i386: Implement avx512 immediate rotate Richard Henderson
2022-03-03 20:59 ` [PULL 13/30] tcg/i386: Implement avx512 variable rotate Richard Henderson
2022-03-03 20:59 ` [PULL 14/30] tcg/i386: Support avx512vbmi2 vector shift-double instructions Richard Henderson
2022-03-03 20:59 ` [PULL 15/30] tcg/i386: Expand vector word rotate as avx512vbmi2 shift-double Richard Henderson
2022-03-03 20:59 ` [PULL 16/30] tcg/i386: Remove rotls_vec from tcg_target_op_def Richard Henderson
2022-03-03 20:59 ` [PULL 17/30] tcg/i386: Expand scalar rotate with avx512 insns Richard Henderson
2022-03-03 20:59 ` [PULL 18/30] tcg/i386: Implement avx512 min/max/abs Richard Henderson
2022-03-03 20:59 ` [PULL 19/30] tcg/i386: Implement avx512 multiply Richard Henderson
2022-03-03 20:59 ` [PULL 20/30] tcg/i386: Implement more logical operations for avx512 Richard Henderson
2022-03-03 20:59 ` [PULL 21/30] tcg/i386: Implement bitsel " Richard Henderson
2022-03-03 20:59 ` [PULL 22/30] tcg: Add TCG_TARGET_SIGNED_ADDR32 Richard Henderson
2022-03-03 20:59 ` [PULL 23/30] accel/tcg: Split out g2h_tlbe Richard Henderson
2022-03-03 20:59 ` [PULL 24/30] accel/tcg: Support TCG_TARGET_SIGNED_ADDR32 for softmmu Richard Henderson
2022-03-03 20:59 ` [PULL 25/30] accel/tcg: Add guest_base_signed_addr32 for user-only Richard Henderson
2022-03-03 20:59 ` [PULL 26/30] linux-user: Support TCG_TARGET_SIGNED_ADDR32 Richard Henderson
2022-03-03 20:59 ` [PULL 27/30] tcg/aarch64: " Richard Henderson
2022-03-03 20:59 ` [PULL 28/30] tcg/mips: " Richard Henderson
2022-03-03 20:59 ` [PULL 29/30] tcg/riscv: " Richard Henderson
2022-03-03 20:59 ` [PULL 30/30] tcg/loongarch64: " Richard Henderson
2022-03-04 15:22 ` [PULL 00/30] tcg patch queue Peter Maydell
2022-03-04 18:47 ` Richard Henderson [this message]
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