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Thu, 06 Mar 2025 13:30:24 -0800 (PST) Received: from DESKTOPUU50BPD ([2603:6000:a500:306:f449:4838:1970:9d05]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6e8f707c3acsm11390596d6.12.2025.03.06.13.30.23 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Mar 2025 13:30:24 -0800 (PST) From: To: "'Brian Cain'" , Cc: , , , , , , , , , "'Brian Cain'" References: <20250301052628.1011210-1-brian.cain@oss.qualcomm.com> <20250301052628.1011210-9-brian.cain@oss.qualcomm.com> In-Reply-To: <20250301052628.1011210-9-brian.cain@oss.qualcomm.com> Subject: RE: [PATCH 08/38] target/hexagon: Add guest, system reg number defs Date: Thu, 6 Mar 2025 15:30:23 -0600 Message-ID: <023901db8ede$f8dc6980$ea953c80$@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Content-Language: en-us Thread-Index: AQERX/uiI+LG127bCFnOJB03IqEGrgJEfDXJtOjX9bA= X-Antivirus: Norton (VPS 250306-6, 3/6/2025), Outbound message X-Antivirus-Status: Clean Received-SPF: pass client-ip=2607:f8b0:4864:20::f34; envelope-from=ltaylorsimpson@gmail.com; helo=mail-qv1-xf34.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org > -----Original Message----- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.cain@oss.qualcomm.com; richard.henderson@linaro.org; > philmd@linaro.org; quic_mathbern@quicinc.com; ale@rev.ng; anjo@rev.ng; > quic_mliebel@quicinc.com; ltaylorsimpson@gmail.com; > alex.bennee@linaro.org; quic_mburton@quicinc.com; > sidneym@quicinc.com; Brian Cain > Subject: [PATCH 08/38] target/hexagon: Add guest, system reg number = defs >=20 > From: Brian Cain >=20 > These registers are defined in the Qualcomm Hexagon V71 Programmer's > Reference Manual - https://docs.qualcomm.com/bundle/publicresource/80- > N2040-51_REV_AB_Hexagon_V71_ProgrammerS_Reference_Manual.pdf > Refer to =C2=A711.9.1 SYSTEM GUEST, =C2=A711.9.2 SYSTEM MONITOR. Strange to put this in the checkin description. See prior conversation = about doc references. >=20 > Signed-off-by: Brian Cain > --- > target/hexagon/cpu.h | 5 ++ > target/hexagon/hex_regs.h | 115 > ++++++++++++++++++++++++++++++++++++++ > 2 files changed, 120 insertions(+) >=20 > diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index > 79e60d4bfa..20ea0adcca 100644 > --- a/target/hexagon/cpu.h > +++ b/target/hexagon/cpu.h > @@ -20,6 +20,11 @@ >=20 > #include "fpu/softfloat-types.h" >=20 > +#define NUM_GREGS 32 > +#define GREG_WRITES_MAX 32 Can you actually write 32 G registers in a single packet? > +#define NUM_SREGS 64 > +#define SREG_WRITES_MAX 64 Ditto > + > #include "cpu-qom.h" > #include "exec/cpu-defs.h" > #include "hex_regs.h"