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From: Auger Eric <eric.auger@redhat.com>
To: Andrew Jones <drjones@redhat.com>,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
	armbru@redhat.com, imammedo@redhat.com, alex.bennee@linaro.org,
	Dave.Martin@arm.com
Subject: Re: [Qemu-devel] [PATCH v2 11/14] target/arm/kvm64: max cpu: Enable SVE when available
Date: Fri, 28 Jun 2019 18:14:40 +0200	[thread overview]
Message-ID: <026dd970-f524-ed17-ea25-bcad39ac8b1b@redhat.com> (raw)
In-Reply-To: <20190621163422.6127-12-drjones@redhat.com>

Hi Drew,

On 6/21/19 6:34 PM, Andrew Jones wrote:
> Enable SVE in the KVM guest when the 'max' cpu type is configured
> and KVM supports it. KVM SVE requires use of the new finalize
> vcpu ioctl, so we add that now too. For starters SVE can only be
> turned on or off, getting all vector lengths the host CPU supports
> when on. We'll add the other SVE CPU properties in later patches.
> 
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
>  target/arm/cpu64.c       | 24 ++++++++++++++++++++++--
>  target/arm/kvm.c         |  5 +++++
>  target/arm/kvm64.c       | 25 ++++++++++++++++++++++++-
>  target/arm/kvm_arm.h     | 27 +++++++++++++++++++++++++++
>  tests/arm-cpu-features.c |  1 +
>  5 files changed, 79 insertions(+), 3 deletions(-)
> 
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index 5def82111dee..2e595ad53137 100644
> --- a/target/arm/cpu64.c
> +++ b/target/arm/cpu64.c
> @@ -371,6 +371,11 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
>          return;
>      }
>  
> +    /* sve-max-vq and sve<vl-bits> properties not yet implemented for KVM */
> +    if (kvm_enabled()) {
> +        return;
> +    }
> +
>      if (cpu->sve_max_vq == ARM_SVE_INIT) {
>          object_property_set_uint(OBJECT(cpu), ARM_MAX_VQ, "sve-max-vq", &err);
>          if (err) {
> @@ -632,6 +637,10 @@ static void cpu_arm_get_sve(Object *obj, Visitor *v, const char *name,
>      ARMCPU *cpu = ARM_CPU(obj);
>      bool value = !!cpu->sve_max_vq;
>  
> +    if (kvm_enabled() && !kvm_arm_sve_supported(CPU(cpu))) {
> +        value = false;
> +    }
> +
>      visit_type_bool(v, name, &value, errp);
>  }
>  
> @@ -649,6 +658,11 @@ static void cpu_arm_set_sve(Object *obj, Visitor *v, const char *name,
>      }
>  
>      if (value) {
> +        if (kvm_enabled() && !kvm_arm_sve_supported(CPU(cpu))) {
> +            error_setg(errp, "'sve' feature not supported by KVM on this host");
> +            return;
> +        }
> +
>          /*
>           * We handle the -cpu <cpu>,sve=off,sve=on case by reinitializing,
>           * but otherwise we don't do anything as an sve=on could come after
> @@ -675,6 +689,11 @@ static void aarch64_max_initfn(Object *obj)
>  
>      if (kvm_enabled()) {
>          kvm_arm_set_cpu_features_from_host(cpu);
> +        /*
> +         * KVM doesn't yet support the sve-max-vq property, but
> +         * setting cpu->sve_max_vq is also used to turn SVE on.
> +         */
> +        cpu->sve_max_vq = ARM_SVE_INIT;
>      } else {
>          uint64_t t;
>          uint32_t u;
> @@ -764,8 +783,6 @@ static void aarch64_max_initfn(Object *obj)
>          cpu->sve_max_vq = ARM_SVE_INIT;
>          object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq,
>                              cpu_max_set_sve_max_vq, NULL, NULL, &error_fatal);
> -        object_property_add(obj, "sve", "bool", cpu_arm_get_sve,
> -                            cpu_arm_set_sve, NULL, NULL, &error_fatal);
>  
>          /*
>           * sve_vq_map uses a special state while setting properties, so
> @@ -780,6 +797,9 @@ static void aarch64_max_initfn(Object *obj)
>                                  cpu_arm_set_sve_vq, NULL, NULL, &error_fatal);
>          }
>      }
> +
> +    object_property_add(obj, "sve", "bool", cpu_arm_get_sve,
> +                        cpu_arm_set_sve, NULL, NULL, &error_fatal);
>  }
>  
>  struct ARMCPUInfo {
> diff --git a/target/arm/kvm.c b/target/arm/kvm.c
> index 69c961a4c62c..60645a196d3d 100644
> --- a/target/arm/kvm.c
> +++ b/target/arm/kvm.c
> @@ -49,6 +49,11 @@ int kvm_arm_vcpu_init(CPUState *cs)
>      return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
>  }
>  
> +int kvm_arm_vcpu_finalize(CPUState *cs, int feature)
> +{
> +    return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_FINALIZE, &feature);
> +}
> +
>  void kvm_arm_init_serror_injection(CPUState *cs)
>  {
>      cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state,
> diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
> index 706541327491..9fc7f078cf68 100644
> --- a/target/arm/kvm64.c
> +++ b/target/arm/kvm64.c
> @@ -604,6 +604,15 @@ bool kvm_arm_aarch32_supported(CPUState *cpu)
>      return ret > 0;
>  }
>  
> +bool kvm_arm_sve_supported(CPUState *cpu)
> +{
> +    KVMState *s = KVM_STATE(current_machine->accelerator);
> +    int ret;
> +
> +    ret = kvm_check_extension(s, KVM_CAP_ARM_SVE);
> +    return ret > 0;
return kvm_check_extension()

Eric
> +}
> +
>  #define ARM_CPU_ID_MPIDR       3, 0, 0, 0, 5
>  
>  int kvm_arch_init_vcpu(CPUState *cs)
> @@ -632,13 +641,20 @@ int kvm_arch_init_vcpu(CPUState *cs)
>          cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_EL1_32BIT;
>      }
>      if (!kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PMU_V3)) {
> -            cpu->has_pmu = false;
> +        cpu->has_pmu = false;
>      }
>      if (cpu->has_pmu) {
>          cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PMU_V3;
>      } else {
>          unset_feature(&env->features, ARM_FEATURE_PMU);
>      }
> +    if (cpu->sve_max_vq) {
> +        if (!kvm_arm_sve_supported(cs)) {
> +            cpu->sve_max_vq = 0;
> +        } else {
> +            cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_SVE;
> +        }
> +    }
>  
>      /* Do KVM_ARM_VCPU_INIT ioctl */
>      ret = kvm_arm_vcpu_init(cs);
> @@ -646,6 +662,13 @@ int kvm_arch_init_vcpu(CPUState *cs)
>          return ret;
>      }
>  
> +    if (cpu->sve_max_vq) {
> +        ret = kvm_arm_vcpu_finalize(cs, KVM_ARM_VCPU_SVE);
> +        if (ret) {
> +            return ret;
> +        }
> +    }
> +
>      /*
>       * When KVM is in use, PSCI is emulated in-kernel and not by qemu.
>       * Currently KVM has its own idea about MPIDR assignment, so we
> diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
> index e0ded3607996..2367f8ab78ed 100644
> --- a/target/arm/kvm_arm.h
> +++ b/target/arm/kvm_arm.h
> @@ -27,6 +27,20 @@
>   */
>  int kvm_arm_vcpu_init(CPUState *cs);
>  
> +/**
> + * kvm_arm_vcpu_finalize
> + * @cs: CPUState
> + * @feature: int
> + *
> + * Finalizes the configuration of the specified VCPU feature by
> + * invoking the KVM_ARM_VCPU_FINALIZE ioctl. Features requiring
> + * this are documented in the "KVM_ARM_VCPU_FINALIZE" section of
> + * KVM's API documentation.
> + *
> + * Returns: 0 if success else < 0 error code
> + */
> +int kvm_arm_vcpu_finalize(CPUState *cs, int feature);
> +
>  /**
>   * kvm_arm_register_device:
>   * @mr: memory region for this device
> @@ -224,6 +238,14 @@ bool kvm_arm_aarch32_supported(CPUState *cs);
>   */
>  bool kvm_arm_pmu_supported(CPUState *cs);
>  
> +/**
> + * bool kvm_arm_sve_supported:
> + * @cs: CPUState
> + *
> + * Returns true if the KVM VCPU can enable SVE and false otherwise.
> + */
> +bool kvm_arm_sve_supported(CPUState *cs);
> +
>  /**
>   * kvm_arm_get_max_vm_ipa_size - Returns the number of bits in the
>   * IPA address space supported by KVM
> @@ -274,6 +296,11 @@ static inline bool kvm_arm_pmu_supported(CPUState *cs)
>      return false;
>  }
>  
> +static inline bool kvm_arm_sve_supported(CPUState *cs)
> +{
> +    return false;
> +}
> +
>  static inline int kvm_arm_get_max_vm_ipa_size(MachineState *ms)
>  {
>      return -ENOENT;
> diff --git a/tests/arm-cpu-features.c b/tests/arm-cpu-features.c
> index a4bf6aec00df..67ad5f2b78d5 100644
> --- a/tests/arm-cpu-features.c
> +++ b/tests/arm-cpu-features.c
> @@ -393,6 +393,7 @@ static void test_query_cpu_model_expansion_kvm(const void *data)
>  
>      if (g_str_equal(qtest_get_arch(), "aarch64")) {
>          assert_has_feature(qts, "host", "aarch64");
> +        assert_has_feature(qts, "max", "sve");
>  
>          assert_error(qts, "cortex-a15",
>              "The CPU definition 'cortex-a15' cannot "
> 


  parent reply	other threads:[~2019-06-28 17:24 UTC|newest]

Thread overview: 95+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-21 16:34 [Qemu-devel] [PATCH v2 00/14] target/arm/kvm: enable SVE in guests Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 01/14] target/arm/cpu64: Ensure kvm really supports aarch64=off Andrew Jones
2019-06-25  9:35   ` Auger Eric
2019-06-25 13:34     ` Andrew Jones
2019-07-24 12:51       ` Auger Eric
2019-07-24 13:52         ` Andrew Jones
2019-07-24 14:19           ` Auger Eric
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 02/14] target/arm/cpu: Ensure we can use the pmu with kvm Andrew Jones
2019-06-25  9:35   ` Auger Eric
2019-06-26  9:49   ` Richard Henderson
2019-06-26 13:11     ` Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 03/14] target/arm/monitor: Introduce qmp_query_cpu_model_expansion Andrew Jones
2019-06-26  7:43   ` Auger Eric
2019-06-26 13:26     ` Andrew Jones
2019-07-24 12:51       ` Auger Eric
2019-07-24 14:05         ` Andrew Jones
2019-07-24 14:25           ` Auger Eric
2019-07-24 14:44             ` Andrew Jones
2019-07-24 12:55       ` Auger Eric
2019-07-24 14:13         ` Andrew Jones
2019-07-25  8:04   ` Auger Eric
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 04/14] tests: arm: Introduce cpu feature tests Andrew Jones
2019-07-25  7:54   ` Auger Eric
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 05/14] target/arm/helper: zcr: Add build bug next to value range assumption Andrew Jones
2019-06-24 11:05   ` Dave Martin
2019-06-24 11:30     ` Andrew Jones
2019-06-24 16:03       ` Dave Martin
2019-06-25  6:11         ` Andrew Jones
2019-06-25  6:14           ` Andrew Jones
2019-06-26 10:01   ` Auger Eric
2019-06-26 13:28     ` Andrew Jones
2019-06-26 13:40       ` Auger Eric
2019-06-26 13:58         ` Andrew Jones
2019-06-26 14:06           ` Auger Eric
2019-06-26 10:07   ` Richard Henderson
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 06/14] target/arm: Allow SVE to be disabled via a CPU property Andrew Jones
2019-06-21 16:55   ` Philippe Mathieu-Daudé
2019-06-21 17:11     ` Andrew Jones
2019-06-26 10:00   ` Auger Eric
2019-06-26 13:38     ` Andrew Jones
2019-06-26 10:20   ` Richard Henderson
2019-06-26 13:52     ` Andrew Jones
2019-07-17 15:43       ` Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 07/14] target/arm/cpu64: max cpu: Introduce sve<vl-bits> properties Andrew Jones
2019-06-24 11:05   ` Dave Martin
2019-06-24 11:49     ` Andrew Jones
2019-06-24 12:10       ` Andrew Jones
2019-06-24 16:06         ` Dave Martin
2019-06-26 14:58   ` Auger Eric
2019-06-27  9:40     ` Andrew Jones
2019-06-27 10:51       ` Auger Eric
2019-06-27 11:43         ` Andrew Jones
2019-06-26 16:56   ` Auger Eric
2019-06-27 10:46     ` Andrew Jones
2019-06-27 11:00       ` Auger Eric
2019-06-27 11:47         ` Andrew Jones
2019-06-27 15:16           ` Dave Martin
2019-06-27 16:19             ` Richard Henderson
2019-06-27 16:49   ` Richard Henderson
2019-06-28  7:27     ` Andrew Jones
2019-06-28  8:31       ` Andrew Jones
2019-06-29  0:10       ` Richard Henderson
2019-07-17  8:13         ` Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 08/14] target/arm/kvm64: Fix error returns Andrew Jones
2019-06-26 10:53   ` Richard Henderson
2019-06-26 11:50   ` Richard Henderson
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 09/14] target/arm/kvm64: Move the get/put of fpsimd registers out Andrew Jones
2019-06-26 10:35   ` Richard Henderson
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 10/14] target/arm/kvm64: Add kvm_arch_get/put_sve Andrew Jones
2019-06-24 11:05   ` Dave Martin
2019-06-24 11:55     ` Andrew Jones
2019-06-24 16:09       ` Dave Martin
2019-06-26 15:22   ` Richard Henderson
2019-06-27 10:59     ` Dave Martin
2019-06-27 11:26       ` Richard Henderson
2019-06-27 15:02         ` Dave Martin
2019-07-17  9:25           ` Andrew Jones
2019-07-17  9:35     ` Andrew Jones
2019-06-27  6:56   ` Auger Eric
2019-06-27 10:59     ` Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 11/14] target/arm/kvm64: max cpu: Enable SVE when available Andrew Jones
2019-06-26 11:09   ` Richard Henderson
2019-06-27 11:56     ` Andrew Jones
2019-06-28 16:14   ` Auger Eric [this message]
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 12/14] target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features Andrew Jones
2019-06-26 11:11   ` Richard Henderson
2019-06-27  7:30   ` Auger Eric
2019-06-27 10:53     ` Andrew Jones
2019-06-27 11:01     ` Dave Martin
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 13/14] target/arm/cpu64: max cpu: Support sve properties with KVM Andrew Jones
2019-06-28 15:55   ` Auger Eric
2019-07-17  8:41     ` Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 14/14] target/arm/kvm: host cpu: Add support for sve<vl-bits> properties Andrew Jones
2019-06-27 17:15   ` Auger Eric
2019-06-28  7:05     ` Andrew Jones

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