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[2.143.78.206]) by smtp.gmail.com with ESMTPSA id r25sm3248010wrc.26.2021.09.05.02.08.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 05 Sep 2021 02:08:46 -0700 (PDT) Subject: Re: [PATCH v4 10/21] target/loongarch: Add floating point arithmetic instruction translation To: Song Gao , qemu-devel@nongnu.org References: <1630586467-22463-1-git-send-email-gaosong@loongson.cn> <1630586467-22463-11-git-send-email-gaosong@loongson.cn> From: Richard Henderson Message-ID: <028a67e7-4efc-47e4-986e-6f3d1563f6c7@linaro.org> Date: Sun, 5 Sep 2021 11:08:39 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <1630586467-22463-11-git-send-email-gaosong@loongson.cn> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -58 X-Spam_score: -5.9 X-Spam_bar: ----- X-Spam_report: (-5.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-3.832, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, yangxiaojuan@loongson.cn, david@redhat.com, bin.meng@windriver.com, mark.cave-ayland@ilande.co.uk, aleksandar.rikalo@syrmia.com, jcmvbkbc@gmail.com, tsimpson@quicinc.com, alistair.francis@wdc.com, edgar.iglesias@gmail.com, chenhuacai@gmail.com, philmd@redhat.com, atar4qemu@gmail.com, thuth@redhat.com, ehabkost@redhat.com, groug@kaod.org, maobibo@loongson.cn, mrolnik@gmail.com, shorne@gmail.com, alex.bennee@linaro.org, david@gibson.dropbear.id.au, kbastian@mail.uni-paderborn.de, crwulff@gmail.com, laurent@vivier.eu, palmer@dabbelt.com, pbonzini@redhat.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 9/2/21 2:40 PM, Song Gao wrote: > +const FloatRoundMode ieee_rm[4] = { Make static. > +int ieee_ex_to_loongarch(int xcpt) This function is only used in this file. Better to make it static and remove the declaration from translate.h, which allows you to remove that include. > +static inline void update_fcsr0(CPULoongArchState *env, uintptr_t pc) Remove inline. > +{ > + int flags = ieee_ex_to_loongarch(get_float_exception_flags( > + &env->fp_status)); > + > + SET_FP_CAUSE(env->fcsr0, flags); > + if (flags) { Hmm. Between the two functions you're testing for zero twice. Perhaps better to rearrange as { int flags = get_float_exception_flags(&env->fp_status); if (!flags) { SET_FP_CAUSE(env->fcsr0, 0); return; } set_float_exception_flags(0, &env->fp_status); flags = ieee_ex_to_loongarch(flags); SET_FP_CAUSE(env->fcsr0, flags); if (GET_FP_ENABLE(env->fcsr0) & flags) { do_raise_exception(env, EXCP_FPE, pc); } UPDATE_FP_FLAGS(env->fcsr0, flags); } and remove the explicit zero test in ieee_ex_to_loongarch. > +uint64_t helper_flogb_s(CPULoongArchState *env, uint64_t fj) > +{ > + uint64_t fd; > + uint32_t fp; > + float_status *status = &env->fp_status; > + FloatRoundMode old_mode = get_float_rounding_mode(status); > + > + set_float_exception_flags(0, status); Unnecessary, since the steady-state is already zero. > + set_float_exception_flags(get_float_exception_flags(status) & > + (~float_flag_inexact), status); > + update_fcsr0(env, GETPC()); Hmm. Worth adding a parameter to update_fcsr0, a mask to suppress? Or a common subroutine like update_fcsr0_mask(env, GETPC(), float_flag_inexact); static void update_fcsr0(env, ra) { update_fcsr0_mask(env, ra, 0); } > +static bool trans_fcopysign_s(DisasContext *ctx, arg_fmt_fdfjfk *a) > +{ > + tcg_gen_deposit_i64(cpu_fpr[a->fd], cpu_fpr[a->fk], cpu_fpr[a->fj], 0, 31); > + return true; > +} > + > +static bool trans_fcopysign_d(DisasContext *ctx, arg_fmt_fdfjfk *a) > +{ > + tcg_gen_deposit_i64(cpu_fpr[a->fd], cpu_fpr[a->fk], cpu_fpr[a->fj], 0, 63); > + return true; > +} For what it's worth, you could treat the abs and neg instructions similarly, inline. r~