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From: Julia Suvorova <jusual@mail.ru>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Stefan Hajnoczi" <stefanha@redhat.com>,
	"Joel Stanley" <joel@jms.id.au>,
	"Jim Mussared" <jim@groklearning.com>,
	"Steffen Görtz" <mail@steffen-goertz.de>
Subject: Re: [Qemu-devel] [PATCH v2 0/2] nvic: Handle ARMv6-M SCS reserved registers
Date: Fri, 6 Jul 2018 01:20:01 +0300	[thread overview]
Message-ID: <028d951c-38f4-7689-c43a-7e05c9952f16@mail.ru> (raw)
In-Reply-To: <20180705215052.8795-1-jusual@mail.ru>

On 06.07.2018 00:50, Julia Suvorova wrote:
> v2:
>      * Use ARM_FEATURE_M_MAIN instead of ARM_FEATURE_V7 in most cases
>      * Remove CPUID registers check
>      * Use bad_offset instead of return
>      * Misc style fixes
> 
> Julia Suvorova (2):
>    nvic: Handle ARMv6-M SCS reserved registers
>    tests: Add ARMv6-M reserved register test
> 
>   hw/intc/armv7m_nvic.c             | 51 ++++++++++++++++++++++++--
>   tests/Makefile.include            |  2 ++
>   tests/tcg/arm/test-reserved-reg.c | 60 +++++++++++++++++++++++++++++++
>   3 files changed, 111 insertions(+), 2 deletions(-)
>   create mode 100644 tests/tcg/arm/test-reserved-reg.c

Sorry, bad indents. Please ignore this one, I'll send v3 soon.

Best regards, Julia Suvorova.

      parent reply	other threads:[~2018-07-05 22:20 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-05 21:50 [Qemu-devel] [PATCH v2 0/2] nvic: Handle ARMv6-M SCS reserved registers Julia Suvorova
2018-07-05 21:50 ` [Qemu-devel] [PATCH v2 1/2] " Julia Suvorova
2018-07-05 21:50 ` [Qemu-devel] [RFC v2 2/2] tests: Add ARMv6-M reserved register test Julia Suvorova
2018-07-05 22:20 ` Julia Suvorova [this message]

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