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From: Chinmay Rath <rathc@linux.vnet.ibm.com>
To: Richard Henderson <richard.henderson@linaro.org>,
	Chinmay Rath <rathc@linux.ibm.com>,
	qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, npiggin@gmail.com, danielhb413@gmail.com,
	harshpb@linux.ibm.com
Subject: Re: [PATCH 2/8] target/ppc: Make divw[u] handler method decodetree compatible.
Date: Fri, 19 Apr 2024 14:47:39 +0530	[thread overview]
Message-ID: <02e342b0-2e25-4b77-b932-611b06576ed5@linux.vnet.ibm.com> (raw)
In-Reply-To: <be3dd6e4-2e9f-4a75-a744-327fb5f8e262@linaro.org>

Hi Richard,

On 4/16/24 23:27, Richard Henderson wrote:
> On 4/15/24 23:39, Chinmay Rath wrote:
>> The handler methods for divw[u] instructions internally use 
>> Rc(ctx->opcode),
>> for extraction of Rc field of instructions, which poses a problem if 
>> we move
>> the above said instructions to decodetree, as the ctx->opcode field 
>> is not
>> popluated in decodetree. Hence, making it decodetree compatible, so 
>> that the
>> mentioned insns can be safely move to decodetree specs.
>>
>> Signed-off-by: Chinmay Rath<rathc@linux.ibm.com>
>> ---
>>   target/ppc/translate.c | 9 +++++----
>>   1 file changed, 5 insertions(+), 4 deletions(-)
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
Thank you.
>> +static inline void gen_op_arith_divw(DisasContext *ctx, TCGv ret,
>> +                                     TCGv arg1, TCGv arg2, bool sign,
>> +                                     bool compute_ov, bool compute_rc0)
>
> Could drop the inline at the same time.
> Let the compiler decide.
>
I kept inline as is, as there are multiple gen_op_* routines with inline and
if necessary we could consider removing inline for all of them together 
in a separate patch :

grep inline target/ppc/translate.c | grep gen_op

static inline void gen_op_cmp(TCGv arg0, TCGv arg1, int s, int crf)
static inline void gen_op_cmpi(TCGv arg0, target_ulong arg1, int s, int crf)
static inline void gen_op_cmp32(TCGv arg0, TCGv arg1, int s, int crf)
static inline void gen_op_cmpi32(TCGv arg0, target_ulong arg1, int s, 
int crf)
static inline void gen_op_arith_compute_ov(DisasContext *ctx, TCGv arg0,
static inline void gen_op_arith_compute_ca32(DisasContext *ctx,
static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1,
static inline void gen_op_arith_divw(DisasContext *ctx, TCGv ret,
static inline void gen_op_arith_divd(DisasContext *ctx, TCGv ret,
static inline void gen_op_arith_modw(DisasContext *ctx, TCGv ret, TCGv arg1,
static inline void gen_op_arith_modd(DisasContext *ctx, TCGv ret, TCGv arg1,
static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1,
static inline void gen_op_mfspr(DisasContext *ctx)

Thanks,
Chinmay
>
> r~



  reply	other threads:[~2024-04-19  9:18 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-16  6:39 [PATCH 0/8] target/ppc: Move fixed-point insns to decodetree Chinmay Rath
2024-04-16  6:39 ` [PATCH 1/8] target/ppc: Move mul{li, lw, lwo, hw, hwu} instructions " Chinmay Rath
2024-04-16 17:56   ` Richard Henderson
2024-04-19  9:08     ` Chinmay Rath
2024-04-16  6:39 ` [PATCH 2/8] target/ppc: Make divw[u] handler method decodetree compatible Chinmay Rath
2024-04-16 17:57   ` Richard Henderson
2024-04-19  9:17     ` Chinmay Rath [this message]
2024-04-16  6:39 ` [PATCH 3/8] target/ppc: Move divw[u, e, eu] instructions to decodetree Chinmay Rath
2024-04-16 18:19   ` Richard Henderson
2024-04-19  9:18     ` Chinmay Rath
2024-04-16  6:39 ` [PATCH 4/8] target/ppc: Move neg, darn, mod{sw, uw} " Chinmay Rath
2024-04-16 18:25   ` Richard Henderson
2024-04-19  9:18     ` Chinmay Rath
2024-04-16  6:39 ` [PATCH 5/8] target/ppc: Move multiply fixed-point insns (64-bit operands) " Chinmay Rath
2024-04-16 18:36   ` Richard Henderson
2024-04-19  9:25     ` Chinmay Rath
2024-04-20 15:51       ` Richard Henderson
2024-04-22  6:32         ` Chinmay Rath
2024-04-16  6:39 ` [PATCH 6/8] target/ppc: Move div/mod fixed-point insns (64 bits " Chinmay Rath
2024-04-16 18:38   ` Richard Henderson
2024-04-19  9:26     ` Chinmay Rath
2024-04-16  6:39 ` [PATCH 7/8] target/ppc: Move cmp{rb, eqb}, tw[i], td[i], isel instructions " Chinmay Rath
2024-04-16 19:20   ` Richard Henderson
2024-04-19  9:28     ` Chinmay Rath
2024-04-16  6:39 ` [PATCH 8/8] target/ppc: Move logical fixed-point " Chinmay Rath
2024-04-16 19:35   ` Richard Henderson
2024-04-19  9:29     ` Chinmay Rath

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