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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Gustavo Romero <gustavo.romero@linaro.org>,
	Pierrick Bouvier <pierrick.bouvier@linaro.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [PATCH-for-10.1 23/24] hw/core/cpu: Remove CPUClass::mmu_index()
Date: Wed, 2 Apr 2025 05:50:17 +0200	[thread overview]
Message-ID: <03556e83-472c-4ac1-910d-bff29fa3ba58@linaro.org> (raw)
In-Reply-To: <20250401080938.32278-24-philmd@linaro.org>

On 1/4/25 10:09, Philippe Mathieu-Daudé wrote:
> All targets have been converted to TCGCPUOps::mmu_index(),
> remove the now unused CPUClass::mmu_index().
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/exec/cpu-mmu-index.h | 4 +---
>   include/hw/core/cpu.h        | 2 --
>   2 files changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/include/exec/cpu-mmu-index.h b/include/exec/cpu-mmu-index.h
> index 651526e9f97..a87b6f7c4b7 100644
> --- a/include/exec/cpu-mmu-index.h
> +++ b/include/exec/cpu-mmu-index.h
> @@ -32,9 +32,7 @@ static inline int cpu_mmu_index(CPUState *cs, bool ifetch)
>   # endif
>   #endif
>   
> -    const TCGCPUOps *tcg_ops = cs->cc->tcg_ops;
> -    int ret = tcg_ops->mmu_index ? tcg_ops->mmu_index(cs, ifetch)
> -                                 : cs->cc->mmu_index(cs, ifetch);
> +    int ret = cs->cc->tcg_ops->mmu_index(cs, ifetch);
>       tcg_debug_assert(ret >= 0 && ret < NB_MMU_MODES);
>       return ret;
>   }
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 60b7abaf49b..10b6b25b344 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -104,7 +104,6 @@ struct SysemuCPUOps;
>    *                 instantiatable CPU type.
>    * @parse_features: Callback to parse command line arguments.
>    * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
> - * @mmu_index: Callback for choosing softmmu mmu index.
>    * @memory_rw_debug: Callback for GDB memory access.
>    * @dump_state: Callback for dumping state.
>    * @query_cpu_fast:
> @@ -151,7 +150,6 @@ struct CPUClass {
>       ObjectClass *(*class_by_name)(const char *cpu_model);
>       void (*parse_features)(const char *typename, char *str, Error **errp);
>   
> -    int (*mmu_index)(CPUState *cpu, bool ifetch);
>       int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
>                              uint8_t *buf, size_t len, bool is_write);
>       void (*dump_state)(CPUState *cpu, FILE *, int flags);

And I'll squash:

-- >8 --
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 8057a5a0ce8..b00f046b29f 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -1077,6 +1077,7 @@ bool tcg_exec_realizefn(CPUState *cpu, Error **errp)
          assert(tcg_ops->cpu_exec_interrupt);
  #endif /* !CONFIG_USER_ONLY */
          assert(tcg_ops->translate_code);
+        assert(tcg_ops->mmu_index);
          tcg_ops->initialize();
          tcg_target_initialized = true;
      }
---


  reply	other threads:[~2025-04-02  3:51 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-01  8:09 [PATCH-for-10.1 00/24] cpus: Restrict SoftMMU mmu_index() to TCG Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 01/24] hw/core/cpu: Update CPUClass::mmu_index docstring Philippe Mathieu-Daudé
2025-04-03 16:41   ` Richard Henderson
2025-04-01  8:09 ` [PATCH-for-10.1 02/24] accel/tcg: Introduce TCGCPUOps::mmu_index() callback Philippe Mathieu-Daudé
2025-04-03 16:42   ` Richard Henderson
2025-04-01  8:09 ` [PATCH-for-10.1 03/24] target/alpha: Restrict SoftMMU mmu_index() to TCG Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 04/24] target/arm: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 05/24] target/avr: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 06/24] target/hppa: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 07/24] target/i386: Remove unused cpu_(ldub, stb)_kernel macros Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 08/24] target/i386: Restrict cpu_mmu_index_kernel() to TCG Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 09/24] target/i386: Restrict SoftMMU mmu_index() " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 10/24] target/loongarch: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 11/24] target/m68k: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 12/24] target/microblaze: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 13/24] target/mips: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 14/24] target/openrisc: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 15/24] target/ppc: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 16/24] target/riscv: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 17/24] target/rx: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 18/24] target/s390x: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 19/24] target/sh4: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 20/24] target/sparc: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 21/24] target/tricore: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 22/24] target/xtensa: " Philippe Mathieu-Daudé
2025-04-01  8:09 ` [PATCH-for-10.1 23/24] hw/core/cpu: Remove CPUClass::mmu_index() Philippe Mathieu-Daudé
2025-04-02  3:50   ` Philippe Mathieu-Daudé [this message]
2025-04-03 16:42     ` Richard Henderson
2025-04-01  8:09 ` [PATCH-for-10.1 24/24] exec: Restrict cpu-mmu-index.h to accel/tcg/ Philippe Mathieu-Daudé
2025-04-01 17:52 ` [PATCH-for-10.1 00/24] cpus: Restrict SoftMMU mmu_index() to TCG Richard Henderson
2025-04-03 17:21 ` Richard Henderson

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