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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=ddutile@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.644, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 5/2/25 6:27 AM, Shameer Kolothum wrote: > Although this change does not affect functionality at present, it lays > the groundwork for enabling user-created SMMUv3 devices in > future patches > > Signed-off-by: Shameer Kolothum > --- > hw/arm/smmuv3.c | 26 ++++++++++++++++++++++++++ > hw/arm/virt.c | 3 ++- > 2 files changed, 28 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c > index ab67972353..605de9b721 100644 > --- a/hw/arm/smmuv3.c > +++ b/hw/arm/smmuv3.c > @@ -24,6 +24,7 @@ > #include "hw/qdev-properties.h" > #include "hw/qdev-core.h" > #include "hw/pci/pci.h" > +#include "hw/pci/pci_bridge.h" > #include "cpu.h" > #include "exec/target_page.h" > #include "trace.h" > @@ -1874,6 +1875,25 @@ static void smmu_reset_exit(Object *obj, ResetType type) > smmuv3_init_regs(s); > } > > +static int smmuv3_pcie_bus(Object *obj, void *opaque) > +{ > + DeviceState *d = opaque; > + PCIBus *bus; > + > + if (!object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) { > + return 0; > + } > + > + bus = PCI_HOST_BRIDGE(obj)->bus; > + if (d->parent_bus && !strcmp(bus->qbus.name, d->parent_bus->name)) { > + object_property_set_link(OBJECT(d), "primary-bus", OBJECT(bus), > + &error_abort); > + /* Return non-zero as we got the bus and don't need further iteration.*/ > + return 1; > + } > + return 0; > +} > + > static void smmu_realize(DeviceState *d, Error **errp) > { > SMMUState *sys = ARM_SMMU(d); > @@ -1882,6 +1902,10 @@ static void smmu_realize(DeviceState *d, Error **errp) > SysBusDevice *dev = SYS_BUS_DEVICE(d); > Error *local_err = NULL; > > + if (!object_property_get_link(OBJECT(d), "primary-bus", &error_abort)) { > + object_child_foreach_recursive(object_get_root(), smmuv3_pcie_bus, d); > + } > + > c->parent_realize(d, &local_err); > if (local_err) { > error_propagate(errp, local_err); > @@ -1996,6 +2020,8 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data) > device_class_set_parent_realize(dc, smmu_realize, > &c->parent_realize); > device_class_set_props(dc, smmuv3_properties); > + dc->hotpluggable = false; > + dc->bus_type = TYPE_PCIE_BUS; Does this force legacy SMMUv3 to be tied to a PCIe bus now? if so, will that break some existing legacy smmuv3 configs?, i.e., virtio-scsi attached to a legacy smmuv3. > } > > static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > index 177f3dd22c..3bae4e374f 100644 > --- a/hw/arm/virt.c > +++ b/hw/arm/virt.c > @@ -56,6 +56,7 @@ > #include "qemu/cutils.h" > #include "qemu/error-report.h" > #include "qemu/module.h" > +#include "hw/pci/pci_bus.h" > #include "hw/pci-host/gpex.h" > #include "hw/virtio/virtio-pci.h" > #include "hw/core/sysbus-fdt.h" > @@ -1442,7 +1443,7 @@ static void create_smmu(const VirtMachineState *vms, > } > object_property_set_link(OBJECT(dev), "primary-bus", OBJECT(bus), > &error_abort); > - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); > + qdev_realize_and_unref(dev, &bus->qbus, &error_fatal); > sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); > for (i = 0; i < NUM_SMMU_IRQS; i++) { > sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,