From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PULL 00/33] target-arm queue
Date: Wed, 15 Dec 2021 12:12:13 -0800 [thread overview]
Message-ID: <03c9a697-f2d5-1aa4-033a-6fb298c1f4bf@linaro.org> (raw)
In-Reply-To: <20211215104049.2030475-1-peter.maydell@linaro.org>
On 12/15/21 2:40 AM, Peter Maydell wrote:
> Hi; here's the first target-arm pullreq for the 7.0 cycle.
>
> thanks
> -- PMM
>
> The following changes since commit 76b56fdfc9fa43ec6e5986aee33f108c6c6a511e:
>
> Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging (2021-12-14 12:46:18 -0800)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20211215
>
> for you to fetch changes up to aed176558806674d030a8305d989d4e6a5073359:
>
> tests/acpi: add expected blob for VIOT test on virt machine (2021-12-15 10:35:26 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * ITS: error reporting cleanup
> * aspeed: improve documentation
> * Fix STM32F2XX USART data register readout
> * allow emulated GICv3 to be disabled in non-TCG builds
> * fix exception priority for singlestep, misaligned PC, bp, etc
> * Correct calculation of tlb range invalidate length
> * npcm7xx_emc: fix missing queue_flush
> * virt: Add VIOT ACPI table for virtio-iommu
> * target/i386: Use assert() to sanity-check b1 in SSE decode
> * Don't include qemu-common unnecessarily
>
> ----------------------------------------------------------------
> Alex Bennée (1):
> hw/intc: clean-up error reporting for failed ITS cmd
>
> Jean-Philippe Brucker (8):
> hw/arm/virt-acpi-build: Add VIOT table for virtio-iommu
> hw/arm/virt: Remove device tree restriction for virtio-iommu
> hw/arm/virt: Reject instantiation of multiple IOMMUs
> hw/arm/virt: Use object_property_set instead of qdev_prop_set
> tests/acpi: allow updates of VIOT expected data files
> tests/acpi: add test case for VIOT
> tests/acpi: add expected blobs for VIOT test on q35 machine
> tests/acpi: add expected blob for VIOT test on virt machine
>
> Joel Stanley (4):
> docs: aspeed: Add new boards
> docs: aspeed: Update OpenBMC image URL
> docs: aspeed: Give an example of booting a kernel
> docs: aspeed: ADC is now modelled
>
> Olivier Hériveaux (1):
> Fix STM32F2XX USART data register readout
>
> Patrick Venture (1):
> hw/net: npcm7xx_emc fix missing queue_flush
>
> Peter Maydell (6):
> target/i386: Use assert() to sanity-check b1 in SSE decode
> include/hw/i386: Don't include qemu-common.h in .h files
> target/hexagon/cpu.h: don't include qemu-common.h
> target/rx/cpu.h: Don't include qemu-common.h
> hw/arm: Don't include qemu-common.h unnecessarily
> target/arm: Correct calculation of tlb range invalidate length
>
> Philippe Mathieu-Daudé (2):
> hw/intc/arm_gicv3: Extract gicv3_set_gicv3state from arm_gicv3_cpuif.c
> hw/intc/arm_gicv3: Introduce CONFIG_ARM_GIC_TCG Kconfig selector
>
> Richard Henderson (10):
> target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insn
> target/arm: Hoist pc_next to a local variable in arm_tr_translate_insn
> target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insn
> target/arm: Split arm_pre_translate_insn
> target/arm: Advance pc for arch single-step exception
> target/arm: Split compute_fsr_fsc out of arm_deliver_fault
> target/arm: Take an exception if PC is misaligned
> target/arm: Assert thumb pc is aligned
> target/arm: Suppress bp for exceptions with more priority
> tests/tcg: Add arm and aarch64 pc alignment tests
>
> docs/system/arm/aspeed.rst | 26 ++++++++++++----
> include/hw/i386/microvm.h | 1 -
> include/hw/i386/x86.h | 1 -
> target/arm/helper.h | 1 +
> target/arm/syndrome.h | 5 +++
> target/hexagon/cpu.h | 1 -
> target/rx/cpu.h | 1 -
> hw/arm/boot.c | 1 -
> hw/arm/digic_boards.c | 1 -
> hw/arm/highbank.c | 1 -
> hw/arm/npcm7xx_boards.c | 1 -
> hw/arm/sbsa-ref.c | 1 -
> hw/arm/stm32f405_soc.c | 1 -
> hw/arm/vexpress.c | 1 -
> hw/arm/virt-acpi-build.c | 7 +++++
> hw/arm/virt.c | 21 ++++++-------
> hw/char/stm32f2xx_usart.c | 3 +-
> hw/intc/arm_gicv3.c | 2 +-
> hw/intc/arm_gicv3_cpuif.c | 10 +-----
> hw/intc/arm_gicv3_cpuif_common.c | 22 +++++++++++++
> hw/intc/arm_gicv3_its.c | 39 +++++++++++++++--------
> hw/net/npcm7xx_emc.c | 18 +++++------
> hw/virtio/virtio-iommu-pci.c | 12 ++------
> linux-user/aarch64/cpu_loop.c | 46 ++++++++++++++++------------
> linux-user/hexagon/cpu_loop.c | 1 +
> target/arm/debug_helper.c | 23 ++++++++++++++
> target/arm/gdbstub.c | 9 ++++--
> target/arm/helper.c | 6 ++--
> target/arm/machine.c | 10 ++++++
> target/arm/tlb_helper.c | 63 ++++++++++++++++++++++++++++----------
> target/arm/translate-a64.c | 23 ++++++++++++--
> target/arm/translate.c | 58 ++++++++++++++++++++++++++---------
> target/i386/tcg/translate.c | 12 ++------
> tests/qtest/bios-tables-test.c | 38 +++++++++++++++++++++++
> tests/tcg/aarch64/pcalign-a64.c | 37 ++++++++++++++++++++++
> tests/tcg/arm/pcalign-a32.c | 46 ++++++++++++++++++++++++++++
> hw/arm/Kconfig | 1 +
> hw/intc/Kconfig | 5 +++
> hw/intc/meson.build | 11 ++++---
> tests/data/acpi/q35/DSDT.viot | Bin 0 -> 9398 bytes
> tests/data/acpi/q35/VIOT.viot | Bin 0 -> 112 bytes
> tests/data/acpi/virt/VIOT | Bin 0 -> 88 bytes
> tests/tcg/aarch64/Makefile.target | 4 +--
> tests/tcg/arm/Makefile.target | 4 +++
> 44 files changed, 429 insertions(+), 145 deletions(-)
> create mode 100644 hw/intc/arm_gicv3_cpuif_common.c
> create mode 100644 tests/tcg/aarch64/pcalign-a64.c
> create mode 100644 tests/tcg/arm/pcalign-a32.c
> create mode 100644 tests/data/acpi/q35/DSDT.viot
> create mode 100644 tests/data/acpi/q35/VIOT.viot
> create mode 100644 tests/data/acpi/virt/VIOT
Applied, thanks.
r~
next prev parent reply other threads:[~2021-12-15 20:17 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-15 10:40 [PULL 00/33] target-arm queue Peter Maydell
2021-12-15 10:40 ` [PULL 01/33] hw/intc: clean-up error reporting for failed ITS cmd Peter Maydell
2021-12-15 10:40 ` [PULL 02/33] docs: aspeed: Add new boards Peter Maydell
2021-12-15 10:40 ` [PULL 03/33] docs: aspeed: Update OpenBMC image URL Peter Maydell
2021-12-15 10:40 ` [PULL 04/33] docs: aspeed: Give an example of booting a kernel Peter Maydell
2021-12-15 10:40 ` [PULL 05/33] docs: aspeed: ADC is now modelled Peter Maydell
2021-12-15 10:40 ` [PULL 06/33] Fix STM32F2XX USART data register readout Peter Maydell
2021-12-15 10:40 ` [PULL 07/33] hw/intc/arm_gicv3: Extract gicv3_set_gicv3state from arm_gicv3_cpuif.c Peter Maydell
2021-12-15 10:40 ` [PULL 08/33] hw/intc/arm_gicv3: Introduce CONFIG_ARM_GIC_TCG Kconfig selector Peter Maydell
2021-12-15 10:40 ` [PULL 09/33] target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insn Peter Maydell
2021-12-15 10:40 ` [PULL 10/33] target/arm: Hoist pc_next to a local variable in arm_tr_translate_insn Peter Maydell
2021-12-15 10:40 ` [PULL 11/33] target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insn Peter Maydell
2021-12-15 10:40 ` [PULL 12/33] target/arm: Split arm_pre_translate_insn Peter Maydell
2021-12-15 10:40 ` [PULL 13/33] target/arm: Advance pc for arch single-step exception Peter Maydell
2021-12-15 10:40 ` [PULL 14/33] target/arm: Split compute_fsr_fsc out of arm_deliver_fault Peter Maydell
2021-12-15 10:40 ` [PULL 15/33] target/arm: Take an exception if PC is misaligned Peter Maydell
2021-12-15 10:40 ` [PULL 16/33] target/arm: Assert thumb pc is aligned Peter Maydell
2021-12-15 10:40 ` [PULL 17/33] target/arm: Suppress bp for exceptions with more priority Peter Maydell
2021-12-15 10:40 ` [PULL 18/33] tests/tcg: Add arm and aarch64 pc alignment tests Peter Maydell
2021-12-15 10:40 ` [PULL 19/33] target/i386: Use assert() to sanity-check b1 in SSE decode Peter Maydell
2021-12-15 10:40 ` [PULL 20/33] include/hw/i386: Don't include qemu-common.h in .h files Peter Maydell
2021-12-15 10:40 ` [PULL 21/33] target/hexagon/cpu.h: don't include qemu-common.h Peter Maydell
2021-12-15 10:40 ` [PULL 22/33] target/rx/cpu.h: Don't " Peter Maydell
2021-12-15 10:40 ` [PULL 23/33] hw/arm: Don't include qemu-common.h unnecessarily Peter Maydell
2021-12-15 10:40 ` [PULL 24/33] target/arm: Correct calculation of tlb range invalidate length Peter Maydell
2021-12-15 10:40 ` [PULL 25/33] hw/net: npcm7xx_emc fix missing queue_flush Peter Maydell
2021-12-15 10:40 ` [PULL 26/33] hw/arm/virt-acpi-build: Add VIOT table for virtio-iommu Peter Maydell
2021-12-15 10:40 ` [PULL 27/33] hw/arm/virt: Remove device tree restriction " Peter Maydell
2021-12-15 10:40 ` [PULL 28/33] hw/arm/virt: Reject instantiation of multiple IOMMUs Peter Maydell
2021-12-15 10:40 ` [PULL 29/33] hw/arm/virt: Use object_property_set instead of qdev_prop_set Peter Maydell
2021-12-15 10:40 ` [PULL 30/33] tests/acpi: allow updates of VIOT expected data files Peter Maydell
2021-12-15 10:40 ` [PULL 31/33] tests/acpi: add test case for VIOT Peter Maydell
2021-12-16 0:59 ` Richard Henderson
2021-12-16 9:57 ` Jean-Philippe Brucker
2021-12-16 11:28 ` Peter Maydell
2021-12-16 12:26 ` Richard Henderson
2021-12-16 12:56 ` Jean-Philippe Brucker
2021-12-15 10:40 ` [PULL 32/33] tests/acpi: add expected blobs for VIOT test on q35 machine Peter Maydell
2021-12-15 10:40 ` [PULL 33/33] tests/acpi: add expected blob for VIOT test on virt machine Peter Maydell
2021-12-15 20:12 ` Richard Henderson [this message]
-- strict thread matches above, loose matches on Subject: below --
2023-11-02 17:38 [PULL 00/33] target-arm queue Peter Maydell
2023-11-03 3:24 ` Stefan Hajnoczi
2023-06-19 14:28 Peter Maydell
2023-06-19 16:58 ` Richard Henderson
2023-02-03 14:28 Peter Maydell
2023-02-03 18:54 ` Peter Maydell
2021-01-19 15:10 Peter Maydell
2021-01-19 16:00 ` no-reply
2020-02-28 16:38 Peter Maydell
2020-02-28 17:59 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=03c9a697-f2d5-1aa4-033a-6fb298c1f4bf@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).